[PATCH 1/3] dt-bindings: pci: fsl,imx6q-pcie: Add extref clock for i.MX8MQ
From: Rudi Heitbaum
Date: Sun Aug 02 2026 - 07:34:10 EST
i.MX8MQ can drive PCIe REF_CLK either from the internal PLL or from an
off-chip oscillator. Allow an optional fifth "extref" clock to describe
the latter, matching the name already used for i.MX95.
Signed-off-by: Rudi Heitbaum <rudi@xxxxxxxxxxxx>
---
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index e8b8131f5f23..8fb0c919ae57 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -46,7 +46,8 @@ properties:
- description: PCIe PHY clock.
- description: Additional required clock entry for imx6sx-pcie,
imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep.
- - description: PCIe internal reference clock.
+ - description: PCIe internal reference clock for imx95-pcie, or the
+ external reference clock for imx8mq-pcie.
- description: PCIe additional external reference clock.
clock-names:
@@ -173,13 +174,16 @@ allOf:
then:
properties:
clocks:
- maxItems: 4
+ minItems: 4
+ maxItems: 5
clock-names:
+ minItems: 4
items:
- const: pcie
- const: pcie_bus
- const: pcie_phy
- const: pcie_aux
+ - const: extref # Optional
- if:
properties:
--
2.53.0