Re: [PATCH 6/6] LoongArch: KVM: Enable separate vmid feature
From: Bibo Mao
Date: Sun Aug 02 2026 - 21:26:51 EST
On 2026/8/2 下午10:14, Huacai Chen wrote:
Hi, Bibo,I am ok with "> 1" and it is better from software side, only that it requires that HW keeps compatible with later LVZ function. Will discuss this with HW guys.
On Mon, Jul 27, 2026 at 3:31 PM Bibo Mao <maobibo@xxxxxxxxxxx> wrote:
I think ">1" judgement is better than "==2".
With CSR GTLBC shortname for Guest TLB Control Register, separate vmid
feature will be enabled if bit 14 CSR_GTLBC_USEVMID is set. Enable
this feature if cpu_has_guestid is true when LVZ is enabled and the LVZ
version is 2.
Signed-off-by: Bibo Mao <maobibo@xxxxxxxxxxx>
---
arch/loongarch/include/asm/loongarch.h | 2 ++
arch/loongarch/kernel/cpu-probe.c | 7 ++++++-
arch/loongarch/kvm/main.c | 4 +++-
3 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/include/asm/loongarch.h
index 2a6bc99177d8..4c4249446a61 100644
--- a/arch/loongarch/include/asm/loongarch.h
+++ b/arch/loongarch/include/asm/loongarch.h
@@ -350,6 +350,8 @@
#define CSR_GTLBC_TGID_WIDTH 8
#define CSR_GTLBC_TGID_SHIFT_END (CSR_GTLBC_TGID_SHIFT + CSR_GTLBC_TGID_WIDTH - 1)
#define CSR_GTLBC_TGID (_ULCAST_(0xff) << CSR_GTLBC_TGID_SHIFT)
+#define CSR_GTLBC_USEVMID_SHIFT 14
+#define CSR_GTLBC_USEVMID (_ULCAST_(0x1) << CSR_GTLBC_USEVMID_SHIFT)
#define CSR_GTLBC_TOTI_SHIFT 13
#define CSR_GTLBC_TOTI (_ULCAST_(0x1) << CSR_GTLBC_TOTI_SHIFT)
#define CSR_GTLBC_USETGID_SHIFT 12
diff --git a/arch/loongarch/kernel/cpu-probe.c b/arch/loongarch/kernel/cpu-probe.c
index 74d31f260dfd..cbf1dafac0a0 100644
--- a/arch/loongarch/kernel/cpu-probe.c
+++ b/arch/loongarch/kernel/cpu-probe.c
@@ -135,7 +135,7 @@ static void set_isa(struct cpuinfo_loongarch *c, unsigned int isa)
static void cpu_probe_common(struct cpuinfo_loongarch *c)
{
- unsigned int config;
+ unsigned int config, version;
unsigned long asid_mask;
c->options = LOONGARCH_CPU_CPUCFG | LOONGARCH_CPU_CSR | LOONGARCH_CPU_VINT;
@@ -221,6 +221,11 @@ static void cpu_probe_common(struct cpuinfo_loongarch *c)
if (config & CPUCFG2_LVZP) {
c->options |= LOONGARCH_CPU_LVZ;
elf_hwcap |= HWCAP_LOONGARCH_LVZ;
+
+ /* Separate VMID and VPID with LVZ version == 2 */
+ version = (config & CPUCFG2_LVZVER) >> 11;
+ if (version == 2)
Regards
Bibo Mao
Huacai
+ c->options |= LOONGARCH_CPU_GUESTID;
}
#ifdef CONFIG_CPU_HAS_LBT
if (config & CPUCFG2_X86BT) {
diff --git a/arch/loongarch/kvm/main.c b/arch/loongarch/kvm/main.c
index 86b1af823e2b..43f5b40786f2 100644
--- a/arch/loongarch/kvm/main.c
+++ b/arch/loongarch/kvm/main.c
@@ -365,7 +365,7 @@ int kvm_arch_enable_virtualization_cpu(void)
write_csr_gcfg(0);
write_csr_gstat(0);
write_csr_gintc(0);
- clear_csr_gtlbc(CSR_GTLBC_USETGID | CSR_GTLBC_TOTI);
+ clear_csr_gtlbc(CSR_GTLBC_USETGID | CSR_GTLBC_TOTI | CSR_GTLBC_USEVMID);
/*
* Enable virtualization features granting guest direct control of
@@ -388,6 +388,8 @@ int kvm_arch_enable_virtualization_cpu(void)
/* Enable using TGID */
set_csr_gtlbc(CSR_GTLBC_USETGID);
+ if (cpu_has_guestid)
+ set_csr_gtlbc(CSR_GTLBC_USEVMID);
kvm_debug("GCFG:%lx GSTAT:%lx GINTC:%lx GTLBC:%lx",
read_csr_gcfg(), read_csr_gstat(), read_csr_gintc(), read_csr_gtlbc());
--
2.39.3