Re: [PATCH v4 0/5] Add support for Hygon family 18h models 4h-8h

[Fu Hao]

On 7/24/2026 3:31 AM, Borislav Petkov wrote:
> On Fri, Jul 10, 2026 at 02:49:52PM +0800, Fu Hao wrote:
> > This patch series introduce support for the new-generation Hygon
> > processor models 0x4–0x8, addressing five key areas:
>
> Sashiko flagged a bunch of things:
>
> https://sashiko.dev/#/patchset/cover.1783653390.git.fuhao%40open-hieco.net

Hi Boris,

Thanks. I went through the feedback from Sashiko carefully. Here is
the clarification from the Hygon side:

For the current Hygon processor models 0x4 through 0x8, the hardware
dose not support the 0x80000026 CPUID leaf. Because of this, the true
die ID cannot be obtained correctly through the generic x86 topology
subsystem. Prior to this patch, the generic x86 topology code would
wrongly resolve both the die ID and the socket ID to the same value on
Hygon parts, so the die-level topology information was effectively lost.

Regarding your concern that logical IDs must remain contiguous: based on
the current Hygon implementation of CPUID 0x8000001e (ECX), contiguity
is in fact guaranteed. The lower 4 bits of ECX are laid out sequentially
and contiguously, and this layout stays compatible with
__amd_nodes_per_pkg.

So we believe the logical ID constraint is satisfied by the existing
hardware behavior, and this patch does not introduce any discontinuity
for Hygon processor.

We will add a !boot_cpu_has(X86_FEATURE_HYPERVISOR) check in the v5
patch series(for patch 1 and patch 2). In a virtualized guest the
0x8000001e ECX layout is not guaranteed to be contiguous (the VMM
owns that value), so we should simply fall back to the generic topology
path there.

For the microcode part of the patch, some areas need adjustment and will
be updated in v5.

--
Regards,
Fu Hao