[PATCH net-next v2 1/2] dpll: zl3073x: update all DPLL channels on ref_sync_set

From: Ivan Vecera

Date: Mon Aug 03 2026 - 08:03:32 EST


zl3073x_dpll_input_pin_ref_sync_set() excludes the sync source from
automatic reference selection by setting its priority to NONE, but
currently only does this on the single DPLL channel whose pin_priv
was passed to the callback.

Since input pins are registered with every DPLL channel, the priority
update must cover all channels to prevent the sync source from
remaining a selectable candidate on the other channels. This is
a preparation for the following patch which changes the DPLL core to
invoke pin-level set callbacks only through the pin owner's reference
instead of iterating over all registered DPLL devices.

Replace the single-channel priority write with a list_for_each_entry()
loop over all DPLL channels. Each channel's lock is acquired
individually for its read-modify-write sequence. The guard(mutex) is
replaced with explicit mutex_lock/mutex_unlock to allow releasing the
owner's lock before iterating, avoiding nested locking of the same
mutex class.

Signed-off-by: Ivan Vecera <ivecera@xxxxxxxxxx>
---
drivers/dpll/zl3073x/dpll.c | 46 +++++++++++++++++++++++++++----------
1 file changed, 34 insertions(+), 12 deletions(-)

diff --git a/drivers/dpll/zl3073x/dpll.c b/drivers/dpll/zl3073x/dpll.c
index 0488ae6ac486c8..1ea924a9b986b2 100644
--- a/drivers/dpll/zl3073x/dpll.c
+++ b/drivers/dpll/zl3073x/dpll.c
@@ -265,7 +265,7 @@ zl3073x_dpll_input_pin_ref_sync_set(const struct dpll_pin *dpll_pin,
struct zl3073x_ref ref;
int rc;

- guard(mutex)(&zldpll->lock);
+ mutex_lock(&zldpll->lock);

ref_id = zl3073x_input_pin_ref_get(pin->id);
sync_ref_id = zl3073x_input_pin_ref_get(sync_pin->id);
@@ -285,17 +285,20 @@ zl3073x_dpll_input_pin_ref_sync_set(const struct dpll_pin *dpll_pin,
if (sync_freq > 8000) {
NL_SET_ERR_MSG(extack,
"sync frequency must be 8 kHz or less");
- return -EINVAL;
+ rc = -EINVAL;
+ goto unlock;
}
if (ref_freq < 1000) {
NL_SET_ERR_MSG(extack,
"clock frequency must be 1 kHz or more");
- return -EINVAL;
+ rc = -EINVAL;
+ goto unlock;
}
if (ref_freq <= sync_freq) {
NL_SET_ERR_MSG(extack,
"clock frequency must be higher than sync frequency");
- return -EINVAL;
+ rc = -EINVAL;
+ goto unlock;
}

zl3073x_ref_sync_pair_set(&ref, sync_ref_id);
@@ -308,20 +311,39 @@ zl3073x_dpll_input_pin_ref_sync_set(const struct dpll_pin *dpll_pin,

rc = zl3073x_ref_state_set(zldev, ref_id, &ref);
if (rc)
- return rc;
+ goto unlock;

- /* Exclude sync source from automatic reference selection by setting
- * its priority to NONE. On disconnect the priority is left as NONE
- * and the user must explicitly make the pin selectable again.
+ /* All code paths accessing per-channel reference priorities are
+ * serialized by the subsystem dpll_lock, so it is safe to release
+ * our lock here before iterating over the other channels.
+ */
+ mutex_unlock(&zldpll->lock);
+
+ /* The datasheet recommends excluding the sync source from automatic
+ * reference selection by setting its priority to NONE on all DPLL
+ * channels. This is advisory - the ref sync pair is already
+ * configured, so a failure here is not fatal. On disconnect the
+ * priority is left as NONE and the user must explicitly make the
+ * pin selectable again.
*/
if (state == DPLL_PIN_STATE_CONNECTED) {
- chan = *zl3073x_chan_state_get(zldev, zldpll->id);
- zl3073x_chan_ref_prio_set(&chan, sync_ref_id,
- ZL_DPLL_REF_PRIO_NONE);
- return zl3073x_chan_state_set(zldev, zldpll->id, &chan);
+ list_for_each_entry(zldpll, &zldev->dplls, list) {
+ mutex_lock(&zldpll->lock);
+ chan = *zl3073x_chan_state_get(zldev, zldpll->id);
+ zl3073x_chan_ref_prio_set(&chan, sync_ref_id,
+ ZL_DPLL_REF_PRIO_NONE);
+ if (zl3073x_chan_state_set(zldev, zldpll->id, &chan))
+ dev_warn(zldev->dev,
+ "Failed to set ref prio on DPLL%u\n",
+ zldpll->id);
+ mutex_unlock(&zldpll->lock);
+ }
}

return 0;
+unlock:
+ mutex_unlock(&zldpll->lock);
+ return rc;
}

static int
--
2.54.0