[PATCH v2 00/11] Add support for StarFive JHB100 SFC

From: Changhuang Liang

Date: Mon Aug 03 2026 - 09:04:13 EST


This serial add support for the StarFive JHB100 SoC SPI Flash
Controller (SFC), which is based on the Synopsys DesignWare SSI
version 2.00a but with some customizations and it also add
enhanced SPI for DesignWare SPI controllers.

I picked up some patches from series [1].
This series depends on the series [2]:

[1] https://lore.kernel.org/all/20221212180732.79167-1-sudip.mukherjee@xxxxxxxxxx/
[2] https://lore.kernel.org/all/20260521012932.24163-1-changhuang.liang@xxxxxxxxxxxxxxxx/

Change since v1:
- Reordered the series so that every symbol is introduced before its
first user and each patch is independently reviewable.
- adjust_op_size(): clamp DATA_IN to DW_SPI_NDF_MASK + 1 and DATA_OUT to
DW_SPI_NDF_MASK, matching the two NDF programming conventions (receive
writes ndf - 1, transmit writes ndf).
- exec_enh_mem_op(): use op->max_freq rather than mem->spi->max_speed_hz
- detect_enh_mode(): clear the accumulated mode bits when clock
stretching turns out to be unavailable.
- dw_spi_jhb100_set_addr_nbyte() returns an error code, rejects anything
other than 3 or 4 address bytes with a message.
- platform_suspend() and platform_resume() callbacks are introduced to
handle platform-private suspend/resume procedures. JHB100 SFC used it
to re-mask the SFC filter interrupts after a system resume.
- Limit address bytes supported by JHB100 SFC.
- Remove underflow/overflow interrupts in enhanced SPI mode, as clock
stretching ensures these will not occur.

v1: https://lore.kernel.org/all/20260709055204.138168-1-changhuang.liang@xxxxxxxxxxxxxxxx/

Changhuang Liang (2):
spi: dt-bindings: snps,dw-apb-ssi: Add starfive,jhb100-sfc
spi: dw: Add support for StarFive JHB100 SoC SFC

Sudip Mukherjee (9):
spi: dw: Introduce spi_frf and STD_SPI
spi: dw: update SPI_CTRLR0 register
spi: dw: add check for support of enhanced spi
spi: dw: adjust size of mem_op
spi: dw: update NDF while using enhanced spi mode
spi: dw: Introduce enhanced single/dual/quad/octal spi
spi: dw: send cmd and addr to start the spi transfer
spi: dw: use irq handler for enhanced spi
spi: dw: detect enhanced spi mode

.../bindings/spi/snps,dw-apb-ssi.yaml | 22 +
drivers/spi/spi-dw-core.c | 386 +++++++++++++++++-
drivers/spi/spi-dw-mmio.c | 72 ++++
drivers/spi/spi-dw.h | 52 ++-
4 files changed, 521 insertions(+), 11 deletions(-)

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2.25.1