Re: [PATCH v3 1/2] dt-bindings: spi: nuvoton,ma35d1-qspi: Allow additional GPIO chip selects

[Chi-Wen Weng]

Krzysztof Kozlowski 於 2026/8/4 下午 03:05 寫道:
> On Mon, Aug 03, 2026 at 03:49:12PM +0800, Chi-Wen Weng wrote:
> > From: Chi-Wen Weng <cwweng@xxxxxxxxxxx>
> >
> > The MA35D1 QSPI controller provides two native chip selects, but the
> > generic SPI controller binding defines num-cs as the total number of
> > native and GPIO-based chip selects.
> >
> > Remove the maximum value of two from num-cs so that board device trees
> > can describe additional GPIO chip selects while retaining two as the
> > default chip-select count.
> >
> > Signed-off-by: Chi-Wen Weng <cwweng@xxxxxxxxxxx>
> > ---
> >   Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml | 1 -
> >   1 file changed, 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml b/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml
> > index 377ccf4fb224..f837367e6d5f 100644
> > --- a/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml
> > +++ b/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml
> > @@ -30,7 +30,6 @@ properties:
> >   
> >     num-cs:
> >       minimum: 1
> > -    maximum: 2
> >       default: 2
> Isn't num-cs the number of native chip selects?
>
> Best regards,
> Krzysztof

Hi Krzysztof,

Yes, you are right.

I interpreted num-cs as the final number of native and GPIO chip
selects based on the generic binding description. However, the native
chip-select count should remain two here, and the SPI core will expand
num_chipselect automatically when the cs-gpios array contains additional
entries.

Therefore, the maximum value of two should remain in the MA35D1 binding.
I will drop this binding change.

Thanks for the clarification.

Best regards,
Chi-Wen