[PATCH 0/2] iio: accel: adxl367: add INT2 interrupt pin support

[Antoniu Miclaus]

The ADXL367 has two independent interrupt output pins, INT1 and INT2,
either of which may be wired to the host. So far the driver hardcoded
INT1 for all interrupt mappings, so a board that routes only INT2 could
never receive activity, inactivity or FIFO watermark interrupts.

This series adds an optional interrupt-names device tree property to
describe which pin ("INT1" and/or "INT2") is connected, and teaches the
driver to route its interrupt mappings to the matching register
(INTMAP1_LOWER or INTMAP2_LOWER). When no interrupt-names are present,
the driver defaults to INT1 to preserve the existing behaviour.

Antoniu Miclaus (2):
  dt-bindings: iio: accel: adi,adxl367: add interrupt-names
  iio: accel: adxl367: add support for INT2 interrupt pin

 .../bindings/iio/accel/adi,adxl367.yaml       | 11 ++++++-
 drivers/iio/accel/adxl367.c                   | 33 +++++++++++++++++--
 2 files changed, 40 insertions(+), 4 deletions(-)

-- 
2.43.0