Re: [PATCH 2/2] drm/imagination: Move FWCORE_* macros to reg defs

[Alessio Belle]

Hi Alex,

On Fri, 2026-08-07 at 10:17 +0300, Alexandru Dadu wrote:
> From: Matt Coster <matt.coster@xxxxxxxxxx>
> 
> FWCORE_* macros moved to pvr_rogue_cr_defs.h

nit: Period at the end, also could you point out here that these macros should
have been part of that header from the beginning?

In the title, for consistency with the other patch, maybe "reg defs" ->
"register defines".

> 
> Signed-off-by: Matt Coster <matt.coster@xxxxxxxxxx>
> Signed-off-by: Alexandru Dadu <alexandru.dadu@xxxxxxxxxx>

Changes LGTM. Strict checkpatch reports usage of camel case due to "CONFIGx"
(same for the first patch), but unless anyone complains, I'd leave it like this.

Thanks,
Alessio

> ---
>  drivers/gpu/drm/imagination/pvr_fw_riscv.c      | 5 +++--
>  drivers/gpu/drm/imagination/pvr_rogue_cr_defs.h | 2 ++
>  drivers/gpu/drm/imagination/pvr_rogue_defs.h    | 9 ---------
>  3 files changed, 5 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/imagination/pvr_fw_riscv.c b/drivers/gpu/drm/imagination/pvr_fw_riscv.c
> index d2bd263aa25f..c160ec9e3ff2 100644
> --- a/drivers/gpu/drm/imagination/pvr_fw_riscv.c
> +++ b/drivers/gpu/drm/imagination/pvr_fw_riscv.c
> @@ -23,10 +23,11 @@ static int
>  pvr_riscv_wrapper_init(struct pvr_device *pvr_dev)
>  {
>  	const u64 common_opts =
> -		((u64)(ROGUE_FW_HEAP_RISCV_SIZE >> FWCORE_ADDR_REMAP_CONFIGx_SIZE_ALIGNSHIFT)
> +		((u64)(ROGUE_FW_HEAP_RISCV_SIZE
> +		       >> ROGUE_CR_FWCORE_ADDR_REMAP_CONFIGx_SIZE_ALIGNSHIFT)
>  		 << ROGUE_CR_FWCORE_ADDR_REMAP_CONFIGx_SIZE_SHIFT) |
>  		((u64)MMU_CONTEXT_MAPPING_FWPRIV
> -		 << FWCORE_ADDR_REMAP_CONFIGx_MMU_CONTEXT_SHIFT);
> +		 << ROGUE_CR_FWCORE_ADDR_REMAP_CONFIGx_CBASE_SHIFT);
>  
>  	u64 code_addr = pvr_fw_obj_get_gpu_addr(pvr_dev->fw_dev.mem.code_obj);
>  	u64 data_addr = pvr_fw_obj_get_gpu_addr(pvr_dev->fw_dev.mem.data_obj);
> diff --git a/drivers/gpu/drm/imagination/pvr_rogue_cr_defs.h b/drivers/gpu/drm/imagination/pvr_rogue_cr_defs.h
> index 5fbb1ffd0eb9..45d784f2a82c 100644
> --- a/drivers/gpu/drm/imagination/pvr_rogue_cr_defs.h
> +++ b/drivers/gpu/drm/imagination/pvr_rogue_cr_defs.h
> @@ -3029,6 +3029,8 @@
>  #define ROGUE_CR_FWCORE_ADDR_REMAP_CONFIGx_FETCH_EN_EN 0x1000000000000000ULL
>  #define ROGUE_CR_FWCORE_ADDR_REMAP_CONFIGx_SIZE_SHIFT 44U
>  #define ROGUE_CR_FWCORE_ADDR_REMAP_CONFIGx_SIZE_CLRMSK 0xF0000FFFFFFFFFFFULL
> +#define ROGUE_CR_FWCORE_ADDR_REMAP_CONFIGx_SIZE_ALIGNSHIFT 12U
> +#define ROGUE_CR_FWCORE_ADDR_REMAP_CONFIGx_SIZE_ALIGNSIZE 4096U
>  #define ROGUE_CR_FWCORE_ADDR_REMAP_CONFIGx_CBASE_SHIFT 40U
>  #define ROGUE_CR_FWCORE_ADDR_REMAP_CONFIGx_CBASE_CLRMSK 0xFFFFF8FFFFFFFFFFULL
>  #define ROGUE_CR_FWCORE_ADDR_REMAP_CONFIGx_DEVVADDR_SHIFT 12U
> diff --git a/drivers/gpu/drm/imagination/pvr_rogue_defs.h b/drivers/gpu/drm/imagination/pvr_rogue_defs.h
> index 035e2ea39434..f09ab85e590a 100644
> --- a/drivers/gpu/drm/imagination/pvr_rogue_defs.h
> +++ b/drivers/gpu/drm/imagination/pvr_rogue_defs.h
> @@ -96,15 +96,6 @@
>  /* Utility macro for accessing instances of repeated registers */
>  #define PVR_CR_REPEAT_X(REG, N) ((REG##_REPEAT_BASE) + (N) * (REG##_REPEAT_OFFSET))
>  
> -/*
> - * FWCORE wrapper register defines
> - */
> -#define FWCORE_ADDR_REMAP_CONFIGx_MMU_CONTEXT_SHIFT \
> -	ROGUE_CR_FWCORE_ADDR_REMAP_CONFIGx_CBASE_SHIFT
> -#define FWCORE_ADDR_REMAP_CONFIGx_MMU_CONTEXT_CLRMSK \
> -	ROGUE_CR_FWCORE_ADDR_REMAP_CONFIGx_CBASE_CLRMSK
> -#define FWCORE_ADDR_REMAP_CONFIGx_SIZE_ALIGNSHIFT (12U)
> -
>  #define ROGUE_MAX_COMPUTE_SHARED_REGISTERS (2 * 1024)
>  #define ROGUE_MAX_VERTEX_SHARED_REGISTERS 1024
>  #define ROGUE_MAX_PIXEL_SHARED_REGISTERS 1024
>