Re: [PATCH] crypto: amcc - fix missing DMA memory barriers in descriptor handling
From: Herbert Xu
Date: Mon Aug 10 2026 - 04:15:32 EST
On Fri, Jul 31, 2026 at 02:20:40PM -0700, Rosen Penev wrote:
>
> diff --git a/drivers/crypto/amcc/crypto4xx_core.c b/drivers/crypto/amcc/crypto4xx_core.c
> index 0271b5e4d923..851bf075d769 100644
> --- a/drivers/crypto/amcc/crypto4xx_core.c
> +++ b/drivers/crypto/amcc/crypto4xx_core.c
> @@ -876,11 +876,13 @@ int crypto4xx_build_pd(struct crypto_async_request *req,
> }
> }
>
> + pd->pd_ctl_len.w = 0x00400000 | (assoclen + datalen);
> + pd_uinfo->state = PD_ENTRY_INUSE | (is_busy ? PD_ENTRY_BUSY : 0);
> +
> + dma_wmb();
Please always add an accompanying comment explaining exactly which
two writes are being ordered.
> pd->pd_ctl.w = PD_CTL_HOST_READY |
> ((crypto_tfm_alg_type(req->tfm) == CRYPTO_ALG_TYPE_AEAD) ?
> PD_CTL_HASH_FINAL : 0);
> - pd->pd_ctl_len.w = 0x00400000 | (assoclen + datalen);
> - pd_uinfo->state = PD_ENTRY_INUSE | (is_busy ? PD_ENTRY_BUSY : 0);
>
> wmb();
> /* write any value to push engine to read a pd */
> @@ -1031,6 +1033,7 @@ static void crypto4xx_bh_tasklet_cb(unsigned long data)
> ((READ_ONCE(pd->pd_ctl.w) &
> (PD_CTL_PE_DONE | PD_CTL_HOST_READY)) ==
> PD_CTL_PE_DONE)) {
> + dma_rmb();
Ditto. Please add a comment explaining which two reads are being ordered.
Thanks,
--
Email: Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx>
Home Page: http://gondor.apana.org.au/~herbert/
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