[PATCH 3/4] irq: Explain better on NMI_MASK overflow condition

[Boqun Feng]

Currently __preempt_count_nmi_enter() uses 15 as the maximum NMI nesting
level, and it's because 4 bits are used to represent the nesting level
of NMI. Replace the tautological comment with a more direct mention to
the 4 bits limitation to help readers understand this condition.

Suggested-by: Shrikanth Hegde <sshegde@xxxxxxxxxxxxx>
Signed-off-by: Boqun Feng <boqun@xxxxxxxxxx>
---
 include/linux/hardirq.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/linux/hardirq.h b/include/linux/hardirq.h
index 73b48dd9f135..2648c49cd8f6 100644
--- a/include/linux/hardirq.h
+++ b/include/linux/hardirq.h
@@ -108,7 +108,7 @@ DECLARE_PER_CPU(unsigned int, nmi_nesting);
 #define __preempt_count_nmi_enter()				\
 	do {							\
 		__preempt_count_add(HARDIRQ_OFFSET);		\
-		/* Maximum NMI nesting is 15. */		\
+		/* NMI nesting is represented in 4 bits. */	\
 		BUG_ON(__this_cpu_read(nmi_nesting) >= 15);	\
 		__this_cpu_inc(nmi_nesting);			\
 		preempt_count_set(preempt_count() | NMI_MASK);  \
-- 
2.50.1 (Apple Git-155)