Re: [PATCH net-next v6 2/3] dpll: zl3073x: add channel ToD, phase step and TIE operations

[Ivan Vecera]

Sashiko findings and replies:

> Does capturing the post-timestamp here degrade cross-timestamping
> precision? [...]
> Should the post-timestamp be captured immediately after
> zl3073x_chan_tod_ctrl() issues the command?

The post-timestamp must be taken after the semaphore clears, not
after the command write. The hardware latches the ToD value as part
of processing the command, which completes when the semaphore is
cleared. Taking the post-timestamp before the wait would risk the
window not containing the actual latch event, which would be worse
than a wider but correct window.

> Could this retry loop exhaust its budget and fail spuriously [...]?

Testing shows that a single iteration of the loop body (two ToD
reads) takes approximately 17-19 ms. With 20 retries that gives a
budget of 340-380 ms, which is more than enough to outlast the 20 ms
margin window. After the 1 Hz edge crosses, the next read returns
~980 ms of margin and the loop breaks.

> Is it possible for preemption to cause a 1-second clock shift here?

The 20 ms threshold provides sufficient margin for the write
sequence. This requires ~20 ms of preemption under a held mutex to
cause an issue, which is not reachable in practice.

Thanks,
Ivan