[PATCH 03/12] arm64: crypto: Assume a little-endian kernel
From: Will Deacon
Date: Tue Aug 11 2026 - 10:20:18 EST
Commit 5276ea17a23c ("lib/crc: arm64: Assume a little-endian kernel")
removed all usage of the CPU_LE()/CPU_BE() macros from the arm64 CRC
assembly now that big-endian support depends on BROKEN.
Do the same for the crypto assembly code.
Signed-off-by: Will Deacon <will@xxxxxxxxxx>
---
arch/arm64/crypto/aes-ce-ccm-core.S | 4 ++--
arch/arm64/crypto/aes-neonbs-core.S | 4 ++--
arch/arm64/crypto/ghash-ce-core.S | 6 +++---
arch/arm64/crypto/sm4-ce-cipher-core.S | 4 ++--
4 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/crypto/aes-ce-ccm-core.S b/arch/arm64/crypto/aes-ce-ccm-core.S
index f2624238fd95..c2e8f500da14 100644
--- a/arch/arm64/crypto/aes-ce-ccm-core.S
+++ b/arch/arm64/crypto/aes-ce-ccm-core.S
@@ -50,7 +50,7 @@
ld1 {v0.16b}, [x5] /* load mac */
cbz x2, ce_aes_ccm_final
ldr x8, [x6, #8] /* load lower ctr */
-CPU_LE( rev x8, x8 ) /* keep swabbed ctr in reg */
+ rev x8, x8 /* keep swabbed ctr in reg */
0: /* outer loop */
ld1 {v1.8b}, [x6] /* load upper ctr */
prfm pldl1strm, [x1]
@@ -73,7 +73,7 @@ CPU_LE( rev x8, x8 ) /* keep swabbed ctr in reg */
eor v0.16b, v0.16b, v2.16b /* xor mac with pt ^ rk[last] */
st1 {v6.16b}, [x0], #16 /* write output block */
bne 0b
-CPU_LE( rev x8, x8 )
+ rev x8, x8
str x8, [x6, #8] /* store lsb end of ctr (BE) */
cbnz x7, ce_aes_ccm_final
st1 {v0.16b}, [x5] /* store mac */
diff --git a/arch/arm64/crypto/aes-neonbs-core.S b/arch/arm64/crypto/aes-neonbs-core.S
index baf450717b24..ba1f981a5464 100644
--- a/arch/arm64/crypto/aes-neonbs-core.S
+++ b/arch/arm64/crypto/aes-neonbs-core.S
@@ -824,8 +824,8 @@ SYM_FUNC_START(aesbs_ctr_encrypt)
frame_push 0
ldp x7, x8, [x5]
ld1 {v0.16b}, [x5]
-CPU_LE( rev x7, x7 )
-CPU_LE( rev x8, x8 )
+ rev x7, x7
+ rev x8, x8
adds x8, x8, #1
adc x7, x7, xzr
diff --git a/arch/arm64/crypto/ghash-ce-core.S b/arch/arm64/crypto/ghash-ce-core.S
index 33772d8fe6b5..ba350d57fc76 100644
--- a/arch/arm64/crypto/ghash-ce-core.S
+++ b/arch/arm64/crypto/ghash-ce-core.S
@@ -148,7 +148,7 @@ SYM_FUNC_START(pmull_ghash_update_p64)
sub w0, w0, #1
3: /* multiply XL by SHASH in GF(2^128) */
-CPU_LE( rev64 T1.16b, T1.16b )
+ rev64 T1.16b, T1.16b
ext T2.16b, XL.16b, XL.16b, #8
ext IN1.16b, T1.16b, T1.16b, #8
@@ -272,7 +272,7 @@ SYM_FUNC_END(pmull_ghash_update_p64)
cbz x0, 3f // tag only?
ldr w8, [x5, #12] // load lower counter
-CPU_LE( rev w8, w8 )
+ rev w8, w8
0: mov w9, #4 // max blocks per round
add x10, x0, #0xf
@@ -380,7 +380,7 @@ CPU_LE( rev w8, w8 )
ret
5:
-CPU_LE( rev w8, w8 )
+ rev w8, w8
str w8, [x5, #12] // store lower counter
st1 {XL.2d}, [x4]
b 4b
diff --git a/arch/arm64/crypto/sm4-ce-cipher-core.S b/arch/arm64/crypto/sm4-ce-cipher-core.S
index 4ac6cfbc5797..1682d727e097 100644
--- a/arch/arm64/crypto/sm4-ce-cipher-core.S
+++ b/arch/arm64/crypto/sm4-ce-cipher-core.S
@@ -18,7 +18,7 @@
SYM_FUNC_START(sm4_ce_do_crypt)
ld1 {v8.4s}, [x2]
ld1 {v0.4s-v3.4s}, [x0], #64
-CPU_LE( rev32 v8.16b, v8.16b )
+ rev32 v8.16b, v8.16b
ld1 {v4.4s-v7.4s}, [x0]
sm4e v8.4s, v0.4s
sm4e v8.4s, v1.4s
@@ -30,7 +30,7 @@ CPU_LE( rev32 v8.16b, v8.16b )
sm4e v8.4s, v7.4s
rev64 v8.4s, v8.4s
ext v8.16b, v8.16b, v8.16b, #8
-CPU_LE( rev32 v8.16b, v8.16b )
+ rev32 v8.16b, v8.16b
st1 {v8.4s}, [x1]
ret
SYM_FUNC_END(sm4_ce_do_crypt)
--
2.55.0.679.g6767b8d81c-goog