Re: [PATCH v2 2/2] i2c: qcom-geni: add I2C frequency table for 32 MHz firmware-based SEs
From: Mukesh Savaliya
Date: Wed Aug 12 2026 - 13:56:51 EST
On 8/12/2026 2:00 PM, Kathiravan Thirumoorthy wrote:
On IPQ5424, the I2C controller can operate on both RTL-hardened SEs
and firmware-based SEs. As documented in commit 506bb2ab0075
("i2c: qcom-geni: Support systems with 32MHz serial engine clock"),
in IPQ5424 SEs use a 32 MHz source clock.
The existing frequency table does not provide the required SCL timing
parameters for firmware-based SEs. Add a dedicated frequency table
using the SCL counter values recommended by the hardware design team
and select it for firmware-based SEs to achieve the target bus
frequencies.
Move geni_i2c_clk_map_idx() from geni_i2c_resources_init() to
geni_i2c_init() to ensure SE_HW_PARAM_2 is accessed only after the
required clocks have been enabled.
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@xxxxxxxxxxxxxxxx>
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Reviewed-by: Mukesh Savaliya <mukesh.savaliya@xxxxxxxxxxxxxxxx>