[PATCH v4 2/3] drm/tyr: clear stale IRQ state before soft reset

From: Onur Özkan

Date: Thu Aug 13 2026 - 06:45:56 EST


Previous reset may leave the reset completed IRQ set which can make the
poll return too early.

Clear the IRQ first so the driver waits for the current reset to
complete.

Reviewed-by: Daniel Almeida <daniel.almeida@xxxxxxxxxxxxx>
Reviewed-by: Boris Brezillon <boris.brezillon@xxxxxxxxxxxxx>
Signed-off-by: Onur Özkan <work@xxxxxxxxxxxxx>
---
drivers/gpu/drm/tyr/driver.rs | 3 +++
1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/tyr/driver.rs b/drivers/gpu/drm/tyr/driver.rs
index c5063b2be94d..90d6cd988cd2 100644
--- a/drivers/gpu/drm/tyr/driver.rs
+++ b/drivers/gpu/drm/tyr/driver.rs
@@ -86,6 +86,9 @@ pub(crate) struct TyrDrmRegistrationData<'bound> {
}

fn issue_soft_reset(dev: &Device, iomem: &IoMem<'_>) -> Result {
+ // Clear any stale reset IRQ state before issuing a new soft reset.
+ iomem.write_reg(GPU_IRQ_CLEAR::zeroed().with_reset_completed(true));
+
iomem.write_reg(GPU_COMMAND::reset(ResetMode::SoftReset));

poll::read_poll_timeout(

--
2.51.2