Re: [PATCH v2 2/9] clk: renesas: rzg2l: Add PLL7 DSI clock support for RZ/G3L

[Geert Uytterhoeven]

On Tue, 11 Aug 2026 at 20:27, Biju <biju.das.au@xxxxxxxxx> wrote:
> From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
>
> Add a new fractional PLL clock type (CLK_TYPE_G3L_PLLDSI) for the RZ/G3L
> SoC's PLL7, which drives the DSI interface and requires a dedicated
> parameter calculation and programming sequence distinct from other PLLs in
> the RZ/G2L family.
>
> PLL7 output frequency is determined by the formula:
>
>   Ffdco = (NIR + NFR / 4096) * (Fosc / MR)
>   Ffout = Ffdco / (1 << PR)
>
> where:
>   - Fosc = 24 MHz (oscillator input)
>   - PR in [0, 4]   (post divider, power-of-two)
>   - MR in [1, 12]  (input pre-divider)
>   - NIR in [56, 375], NFR in [0, 4095] (integer and fractional parts)
>
> The FDCO must fall within one of two valid ranges: 900–2000 MHz
> (rangesel=0) or 2000–3000 MHz (rangesel=1).
>
> The parameter search in rzg3l_dsi_get_pll_parameters_values() iterates
> over all valid (MR, PR) combinations, filtering by the required FPFD range
> of 8–16 MHz, then delegates to rzg3l_dsi_compute_pll_parameters() to find
> the NIR/NFR pair that best approximates the requested rate. An exact match
> returns immediately; otherwise the combination with the smallest absolute
> frequency error is used.
>
> Computed parameters are cached in pll7_dsi_params within pll_clk to
> avoid redundant recalculation in determine_rate() when the requested
> rate has not changed.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
> v1->v2:
>  * Dropped the macro CPG_PLL_CLK1_VAL and instead using FIELD_PREP
>    at all callsites.
>  * output_nir updated with mul_u32_u32((p->nir + 1) * MILLI, fpfd) as
>    p->nir is small.
>  * output_nfr_range updated with mul_u32_u32(fpfd, MILLI)
>  * nfr updated with div_s64  as div64_s64 is overkill
>  * mul_u32_u32(p->nir + 1, 4096) computation reused in fdco and output.
>  * Open-coded 64-by-32 division replaced with div_u64()

Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in renesas-clk for v7.4.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds