[PATCH 9/9] arm64: dts: qcom: ipq9574: Flatten usb controller node

From: George Moussalem via B4 Relay

Date: Tue Aug 25 2026 - 06:46:55 EST


From: George Moussalem <george.moussalem@xxxxxxxxxxx>

Flatten usb controller nodes and update to using latest bindings and
flattened driver approach.

Add property to the USB node to select UTMI as reference clock for the
DWC3 core to calculate the right values for the period and frame length
adjustment.

Signed-off-by: George Moussalem <george.moussalem@xxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi | 6 ++--
arch/arm64/boot/dts/qcom/ipq9574.dtsi | 42 +++++++++++-------------
2 files changed, 21 insertions(+), 27 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
index 62877b46f9b3..0d06a838c233 100644
--- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
@@ -252,10 +252,6 @@ flash@0 {
};
};

-&usb_0_dwc3 {
- dr_mode = "host";
-};
-
&usb_0_qmpphy {
vdda-pll-supply = <&mp5496_l5>;
vdda-phy-supply = <&regulator_fixed_0p925>;
@@ -272,6 +268,8 @@ &usb_0_qusbphy {
};

&usb3 {
+ dr_mode = "host";
+
status = "okay";
};

diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
index 5a5bda5f21a1..b56ba76e8b54 100644
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
@@ -756,12 +756,9 @@ usb_0_qmpphy: phy@7d000 {
status = "disabled";
};

- usb3: usb@8af8800 {
- compatible = "qcom,ipq9574-dwc3", "qcom,dwc3";
- reg = <0x08af8800 0x400>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
+ usb3: usb@8a00000 {
+ compatible = "qcom,ipq9574-dwc3", "qcom,snps-dwc3";
+ reg = <0x08a00000 0xfc100>;

clocks = <&gcc GCC_SNOC_USB_CLK>,
<&gcc GCC_USB0_MASTER_CLK>,
@@ -780,32 +777,31 @@ usb3: usb@8af8800 {
assigned-clock-rates = <200000000>,
<24000000>;

- interrupts-extended = <&intc GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&intc GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "pwr_event",
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
"qusb2_phy",
"dm_hs_phy_irq",
"dp_hs_phy_irq";

resets = <&gcc GCC_USB_BCR>;
- status = "disabled";

- usb_0_dwc3: usb@8a00000 {
- compatible = "snps,dwc3";
- reg = <0x8a00000 0xcd00>;
- clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
- clock-names = "ref";
- interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usb_0_qusbphy>, <&usb_0_qmpphy>;
- phy-names = "usb2-phy", "usb3-phy";
- tx-fifo-resize;
- snps,is-utmi-l1-suspend;
- snps,hird-threshold = /bits/ 8 <0x0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_u3_susphy_quirk;
- };
+ phys = <&usb_0_qusbphy>, <&usb_0_qmpphy>;
+ phy-names = "usb2-phy", "usb3-phy";
+
+ qcom,select-utmi-as-ref-clk;
+
+ tx-fifo-resize;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+
+ status = "disabled";
};

intc: interrupt-controller@b000000 {

--
2.53.0