[PATCH v4 1/2] dt-bindings: mmc: cdns,sdhci: Add CQE support

From: Rohan Joshi via B4 Relay

Date: Tue Aug 25 2026 - 07:10:06 EST


From: Rohan Joshi <rohan1sj@xxxxxxxxxxx>

Add optional named resource "cqhci" to map the CQE
register space. When present, it is used for CQHCI
initialization and enable Command Queue Engine for eMMC.

The "cqhci" space is optional to maintain compatibility
for platforms that don't have CQE block. When absent, the
controller can operate without the CQE block as routined.

Update amd,pensando-elba platform to include this resource
since Elba does have hardware block required for CQE! The
original author for Elba, Brad Larson (blarson@xxxxxxx)
was able to confirm the CQE support.

Signed-off-by: Rohan Joshi <rohan1sj@xxxxxxxxxxx>
---
.../devicetree/bindings/mmc/cdns,sdhci.yaml | 28 +++++++++++++++++++---
1 file changed, 25 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
index 6c7317d13aa6..10bc9ac2073a 100644
--- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
@@ -22,7 +22,14 @@ properties:

reg:
minItems: 1
- maxItems: 2
+ maxItems: 3
+
+ reg-names:
+ minItems: 1
+ items:
+ - const: hc
+ - enum: [bctl, cqhci]
+ - const: cqhci

interrupts:
maxItems: 1
@@ -131,13 +138,27 @@ allOf:
then:
properties:
reg:
+ minItems: 2
items:
- description: Host controller registers
- description: Elba byte-lane enable register for writes
+ - description: CQE (Command Queuing Engine) registers (optional)
+ reg-names:
+ minItems: 2
+ items:
+ - const: hc
+ - const: bctl
+ - const: cqhci
else:
properties:
reg:
- maxItems: 1
+ items:
+ - description: Host Controller registers
+ - description: CQE (Command Queuing Engine) registers (optional)
+ reg-names:
+ items:
+ - const: hc
+ - const: cqhci

unevaluatedProperties: false

@@ -145,7 +166,8 @@ examples:
- |
emmc: mmc@5a000000 {
compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
- reg = <0x5a000000 0x400>;
+ reg = <0x5a000000 0x400>, <0x5a000400 0x060>;
+ reg-names = "hc", "cqhci";
interrupts = <0 78 4>;
clocks = <&clk 4>;
bus-width = <8>;

--
2.43.0