Re: [PATCH v3 5/8] can: rcar_canfd: Do not set registers selecting the CAN mode

[Geert Uytterhoeven]

Hi Claudiu,

On Tue, 14 Jul 2026 at 19:33, Claudiu Beznea
<claudiu.beznea+renesas@xxxxxxxxx> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
>
> The bits 30 (classical CAN-only mode) and 28 (FD-only enable) of the
> Channel n CAN-FD Configuration Register of the Renesas RZ/G3S SoC are not
> available. The IP supports only CAN-FD mode. RZ/G3S HW manual (revision
> 1.30) specify the bits are read as zero and the write value should always
> be zero.
>
> Add the mode_select_na flag in struct rcar_canfd_hw_info to cover RZ/G3S
> and avoid writing to unavailable bits.
>
> The existing struct rcar_canfd_hw_info instances were updated to address
> the request in the Link discussion.
>
> Commit prepares for the addition of the Renesas RZ/G3S SoC.
>
> Link: https://lore.kernel.org/all/1d9719e3-10ff-4cd8-b729-55fea93c37ce@xxxxxxxxxx
> Reviewed-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>

Thanks for your patch!

Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>

> --- a/drivers/net/can/rcar/rcar_canfd.c
> +++ b/drivers/net/can/rcar/rcar_canfd.c
> @@ -445,6 +445,7 @@ struct rcar_canfd_hw_info {
>         unsigned shared_can_regs:1;     /* Has shared classical can registers */
>         unsigned external_clk:1;        /* Has external clock */
>         unsigned fcan_pclk:1;           /* Has fcan sourced from pclk. */
> +       unsigned mode_select_na:1;      /* Has no bits for selecting the mode. */

As negative flags are harder to read, perhaps "fixed_canfd"?

>  };
>
>  /* Channel priv data */

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds