Re: [PATCH v3 2/2] KVM: x86: Add support for cmpxchg16b emulation

[Mathieu Desnoyers]

On 2026-08-26 03:00, Sairaj Kodilkar wrote:
> AMD and Intel both provides support for 128 bit cmpxchg operands using
> cmpxchg8b/cmpxchg16b instructions (opcode 0FC7). However, kvm does not
> support emulating cmpxchg16b (i.e when destination memory is 128 bit and
> REX.W = 1) which causes emulation failure when QEMU guest performs a
> cmpxchg16b on a memory region setup as a IO.
>
> This failure is seen on the AMD IOMMU driver which writes 256-bit device
> table entries with two 128-bit cmpxchg operations. For guests using
> hardware-accelerated vIOMMU, QEMU traps device table accesses to set up
> nested page tables (see [1]).  Without 128-bit cmpxchg emulation, KVM
> cannot handle these traps and DTE access emulation fails.
>
> Hence extend cmpxchg8b to perform cmpxchg16b when the destination memory
> is 128 bit.
>
> [1] https://github.com/AMDESE/qemu-iommu/blob/wip/for_iommufd_hw_queue-v8_amd_viommu_20260106/hw/i386/amd_viommu.c#L517

You may want to test for the X86_FEATURE_CX16 cpu feature and only
enable this on 64-bit x86 CPUs implementing this instruction.

Thanks,

Mathieu

--
Mathieu Desnoyers
EfficiOS Inc.
https://www.efficios.com