[PATCH 9/9] arm64: dts: renesas: r9a09g087: Wire up DMA support for ADC
From: Cosmin Tanislav
Date: Fri Aug 28 2026 - 11:03:48 EST
RZ/N2H (R9A09G087) has three DMA controllers that can be used by
peripherals like the ADC to offload data transfers from the CPU.
Wire up the DMA channels for the ADC peripherals.
Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@xxxxxxxxxxx>
---
arch/arm64/boot/dts/renesas/r9a09g087.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
index 57ac38df3e51..9e8c6610f0da 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
@@ -1238,6 +1238,8 @@ adc0: adc@90014000 {
clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKL>,
<&cpg CPG_MOD 206>;
clock-names = "adclk", "pclk";
+ dmas = <&dmac0 0x26ba>, <&dmac1 0x26ba>, <&dmac2 0x26ba>;
+ dma-names = "rx", "rx", "rx";
power-domains = <&cpg>;
#address-cells = <1>;
#size-cells = <0>;
@@ -1260,6 +1262,8 @@ adc1: adc@90014400 {
clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKL>,
<&cpg CPG_MOD 207>;
clock-names = "adclk", "pclk";
+ dmas = <&dmac0 0x26bf>, <&dmac1 0x26bf>, <&dmac2 0x26bf>;
+ dma-names = "rx", "rx", "rx";
power-domains = <&cpg>;
#address-cells = <1>;
#size-cells = <0>;
@@ -1282,6 +1286,8 @@ adc2: adc@80008000 {
clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKL>,
<&cpg CPG_MOD 225>;
clock-names = "adclk", "pclk";
+ dmas = <&dmac0 0x26c4>, <&dmac1 0x26c4>, <&dmac2 0x26c4>;
+ dma-names = "rx", "rx", "rx";
power-domains = <&cpg>;
#address-cells = <1>;
#size-cells = <0>;
--
2.55.0