[PATCH 2/3] x86/mce/amd: Reset MCA_SYND1/2 between bank scans

[OptoCloud]

Same issue as the MCA_SYND leak, for the two supplemental AMD
syndrome registers. mce_read_aux() writes
err->vendor.amd.synd1/synd2 only when MCI_STATUS_SYNDV is set, and
nothing clears them between bank iterations in either
machine_check_poll() or __mc_scan_banks(). A bank without SYNDV can
inherit synd1/synd2 from an earlier bank in the same scan.

Reset both fields at the start of each iteration in both loops.

Found by code inspection; not reproduced on hardware.

Fixes: d4fca1358ea9 ("x86/MCE/AMD: Add support for new MCA_SYND{1,2} registers")
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Eirik Bøe <git@xxxxxxxxxxxx>
---
 arch/x86/kernel/cpu/mce/core.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 16183fa4ddc7..e4e588d02a18 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -809,6 +809,8 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
 		m->misc = 0;
 		m->addr = 0;
 		m->synd = 0;
+		err.vendor.amd.synd1 = 0;
+		err.vendor.amd.synd2 = 0;
 		m->bank = i;
 
 		barrier();
@@ -1349,6 +1351,8 @@ __mc_scan_banks(struct mce_hw_err *err, struct pt_regs *regs,
 		m->misc = 0;
 		m->addr = 0;
 		m->synd = 0;
+		err->vendor.amd.synd1 = 0;
+		err->vendor.amd.synd2 = 0;
 		m->bank = i;
 
 		m->status = mce_rdmsrq(mca_msr_reg(i, MCA_STATUS));
-- 
2.47.3