Re: [PATCH] media: hi846: Improve the power on sequence

[Sakari Ailus]

Hi Sebastian,

Thanks for the patch.

On Mon, Aug 31, 2026 at 12:13:32AM +0200, Sebastian Krzyszkowiak wrote:
> Section 4.2 of YACG4D0C9SHC(Hi-846) datasheet specifies the time
> between XSHUTDOWN rising and RESETB rising (t3-1) and RESETB rising
> to the first I2C transaction (t3-2) to be both at least 2400 MCLK
> cycles. This driver currently requires the MCLK rate to be set to
> 25 MHz, so t3-1 and t3-2 need to be at least 96 µs.

Could you calculate the required delay instead of usign static value? The
minimum external clock frequency for the sensor appears to be 10 MHz.

-- 
Regards,

Sakari Ailus