Re: [PATCH] PCI: Reserve prefetchable window headroom for Resizable BARs

From: Mario Limonciello

Date: Mon Aug 31 2026 - 18:53:47 EST




On 8/31/26 12:52, Christian König wrote:


On 8/31/26 18:58, Ilpo Järvinen wrote:
On Mon, 31 Aug 2026, Christian König wrote:
...
2. Pack Oversized Windows (BAR Demotion):
The PCI-to-PCI Bridge spec (r1.2, sec 3.2.5) permits a prefetchable BAR
to be assigned from the non-prefetchable window. By clearing the PREFETCH
flag on small control BARs during enumeration, they are placed below 4 GiB.
The prefetchable window is then cleanly sized to the large BAR alone.

Interesting hack, shouldn't really matter for AMD GPUs but that is
something more on the heuristic side.

A perfectly valid trick which is done by BIOS implementations but what
the Linux PCI subsystem still hasn't learned are back to back
allocations, e.g. something like this:

BAR0 32 GiB of GPU #1
BAR1 2 MiB of GPU #1

BAR1 2 MiB of GPU #2
BAR0 32 GiB of GPU #2

Assuming you're oversimplifying the layout above, this was added by the commit
9036bd0efcb6 ("PCI: Align head space better").

Oh nice! Yeah we had quite a number of bug reports because of that.

Usually hot unplugging some PCIe HW and then re-plugging it caused surprises when the BIOS assigned the resources initially and then the Linux kernel on re-plug.

I need to dig up those bug reports and add a reference to the commit to let people retest.

That's actually "part" of why we have a behavior in thunderbolt.ko that we do a USB4 router reset at module load.

It gives you a clean break to let the resources get assigned by the kernel.

The other part is consistency with other OSes.