Re: [PATCH v2 12/15] gpu: nova-core: drive GSP events with the SWGEN0 interrupt

[Danilo Krummrich]

On 9/1/26 4:54 PM, Alexandre Courbot wrote:
>> +/// Threaded IRQ handler for the GSP SWGEN0 event.
>> +///
>> +/// The top half clears the GIN leaf and reads the falcon SWGEN0 latch. The IRQ thread drains the
>> +/// GSP-to-CPU message queue, which takes the command-queue lock.
>> +#[pin_data]
>> +pub(crate) struct GspInterrupt<'a> {
>> +    /// Borrowed BAR0, for falcon register access from interrupt context.
>> +    bar: Bar0<'a>,
>> +    /// The GSP command queue, drained by the IRQ thread.
>> +    cmdq: Arc<Cmdq>,
> 
> As mentioned above, I strongly suspect this can be a `&'a Cmdq`. Which
> would be great as it would make the whole `Arc` refactoring unnecessary.
Yeah, this does not need a reference count, let's not introduce them where
we don't actually need them.

Thanks,
Danilo