Re: (subset) [PATCH V6 0/4] dmaengine: xilinx_dma: MCDMA descriptor and metadata handling improvements

[Vinod Koul]

On Tue, 18 Aug 2026 23:11:47 +0530, Srinivas Neeli wrote:
> This series improves the Xilinx AXI DMA and MCDMA driver's descriptor
> handling and metadata reporting. It fixes direction-specific descriptor
> field usage, ensures completion is based on the hardware completion bit
> (important with interrupt coalescing), and extends metadata handling to
> expose status and sideband fields alongside APP fields.
> 
> The axienet driver is updated to derive RX frame length from the standard
> dmaengine residue mechanism rather than descriptor APP fields, making it
> work on designs where the AXI4-Stream status/control interface is not
> present.
> 
> [...]

Applied, thanks!

[1/4] dmaengine: xilinx_dma: Fix MCDMA descriptor fields based on DMA direction
      commit: c791d22ddd7b4940fa3c211b5ee7c5d4ce2d1dc3
[2/4] dmaengine: xilinx_dma: Move descriptors to done list based on completion bit
      commit: 5af3ac5de34f9f7a4ae81c690d8dea5dcb523ab0
[4/4] dmaengine: xilinx_dma: Extend metadata handling for AXI DMA and MCDMA
      commit: 37c44606eaac6f600fe2c602372bb02ef5ec0c53

Best regards,
-- 
~Vinod