Re: [PATCH bpf-next v2 1/2] bpf, mips: Factor register moves into helpers

[bot+bpf-ci]

> BPF_MOVSX carries its source width in insn->off. Both MIPS JITs
> currently lower register MOV instructions directly in build_insn().
> Keeping the forthcoming MOVSX width switch there would split the move
> operation between dispatcher cases and backend emitters.
>
> Factor ALU32 and ALU64 register moves into helpers for each backend and
> route the existing MOV paths through them. The helpers own the complete
> move operation, including MIPS32 register-pair handling and the ALU32
> upper-half state. This keeps the following MOVSX width decoding inside
> one per-backend, per-width-class move emitter rather than in dispatcher
> case arms or generic primitives.

This isn't a bug, but the second paragraph seems to repeat the rationale
already given in the first. The first paragraph explains that keeping the
MOVSX width switch in build_insn() would split the move operation between
dispatcher cases and backend emitters. The second paragraph restates this
as keeping MOVSX width decoding inside one per-backend, per-width-class
move emitter rather than in dispatcher case arms or generic primitives.

Could the two be collapsed into a single sentence about why the move
lowering needs to live in one emitter?


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