Re: [PATCH] pci: dwc: Rename PCIE_PORT_LINK_CONTROL to PORT_LINK_CTRL_OFF

[Bjorn Helgaas]

On Sat, Sep 05, 2026 at 12:32:30AM +0800, Hans Zhang wrote:
> On 9/5/26 00:12, Bjorn Helgaas wrote:
> > On Fri, Sep 04, 2026 at 02:18:23PM +0800, Hans Zhang wrote:
> > > The register at offset 0x710 is documented in the Synopsys DesignWare
> > > PCIe Controller Reference Manual as "PORT_LINK_CTRL_OFF" (Port Link
> > > Control Register). The current macro name PCIE_PORT_LINK_CONTROL does
> > > not match the documentation, making it difficult to cross-reference
> > > with the spec when debugging or maintaining the code.
> ...

> I agree with what you said. The official documentation of Synopsys currently
> defines it this way. If the naming is simplified, it would make it harder to
> search for where the registers are located. This is one of the purposes of
> this modification.

One possibility is to add a one-line comment at the #define containing
the name used in the spec.  It's not perfect, but that's basically
what's in pci_regs.h:

  #define PCI_EXP_LNKCAP          0x0c    /* Link Capabilities */
  #define PCI_EXP_LNKCTL          0x10    /* Link Control */
  #define PCI_EXP_LNKSTA          0x12    /* Link Status */