Re: [PATCH v3 7/8] iio: imu: inv_icm42607: Add accelerometer calibbias support

[Jonathan Cameron]

> Expose IIO_CHAN_INFO_CALIBBIAS on the accelerometer channels. The
> registers are stored in MREG1, which can be accessed by the mreg_read
> and mreg_write routines. The calibration bias is written to OFFSET_USER4
> to OFFSET_USER8 registers in MREG1.
> 
> Note: The accelerometer functionality is tested with Invensense,
> ICM42370-P development board.
> 
> Datasheet: https://www.invensense.tdk.com/en-us/products/3-axis/icm-42370-p
> Datasheet: https://www.lcsc.com/product-detail/C5129967.html
> Signed-off-by: Kanak Shilledar <kanak.shilledar@xxxxxxxx>

Various things inline.

Thanks

Jonathan

>
> diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
> index 318373efeb9e..af2ac9d6a47c 100644
> --- a/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
> +++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_accel.c
> @@ -13,6 +13,7 @@
>  #include <linux/pm_runtime.h>
>  #include <linux/regmap.h>
>  #include <linux/types.h>
> +#include <linux/units.h>
>  
>  #include "inv_icm42607.h"
>  #include "inv_icm42607_temp.h"
> @@ -22,9 +23,11 @@
>  	.type = IIO_ACCEL,							\
>  	.modified = 1,								\
>  	.channel2 = _modifier,							\
> -	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),				\
> +	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |				\
> +		BIT(IIO_CHAN_INFO_CALIBBIAS),					\
>  	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),			\
> -	.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE),		\
> +	.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) |	\
> +		BIT(IIO_CHAN_INFO_CALIBBIAS),					\

Sashiko:
[Severity: Medium]
Will reading the in_accel_calibbias_available sysfs attribute fail with
-EINVAL?

Since IIO_CHAN_INFO_CALIBBIAS was added to the _available mask here, does
inv_icm42607_accel_read_avail() also need a new case to handle it?

Right now, it appears to fall through to the default error case:

inv_icm42607_accel_read_avail() {
	switch (mask) {
	case IIO_CHAN_INFO_SCALE:
		...
	case IIO_CHAN_INFO_SAMP_FREQ:
		...
	default:
		return -EINVAL;
	}
}
-
JC, Looks valid to me.

> +
> +static int inv_icm42607_accel_write_offset(struct iio_dev *indio_dev,
> +					   struct iio_chan_spec const *chan,
> +					   int val, int val2)
> +{
> +	struct inv_icm42607_state *st = iio_device_get_drvdata(indio_dev);
> +	struct device *dev = regmap_get_device(st->map);
> +	u8 hi, lo, regval;
> +	s32 min, max;
> +	s16 offset;
> +	s64 val64;
> +	int ret;
> +
> +	if (chan->type != IIO_ACCEL)
> +		return -EINVAL;
> +
> +	/* inv_icm42607_accel_calibbias: min - step - max in micro */
> +	min = inv_icm42607_accel_calibbias[0] * (long)MEGA -
> +	      inv_icm42607_accel_calibbias[1];
> +	max = inv_icm42607_accel_calibbias[4] * (long)MEGA +
> +	      inv_icm42607_accel_calibbias[5];
> +
> +	val64 = (s64)val * (s64)MEGA;
> +	if (val >= 0)
> +		val64 += (s64)val2;
> +	else
> +		val64 -= (s64)val2;
> +
> +	if (val64 < min || val64 > max)
> +		return -EINVAL;
> +
> +	/*
> +	 * Convert m/s² to g then to raw value
> +	 * m/s² to g: 1 / 9.806650
> +	 * g to raw 12 bits signed, step 0.5mg: 10000 / 5
> +	 * val in micro (1000000)
> +	 * val * 10000 / (9.806650 * 1000000 * 5)
> +	 */
> +	val64 = val64 * 10000LL;
> +
> +	/* For rounding, add + or - divisor (9806650 * 5) divided by 2 */
> +	if (val64 >= 0)
> +		val64 += 9806650 * 5 / 2;
> +	else
> +		val64 -= 9806650 * 5 / 2;
> +	offset = div_s64(val64, 9806650 * 5);
> +
> +	/* Clamp value limited to 12 bits signed */
> +	if (offset < -2048)
> +		offset = -2048;
> +	else if (offset > 2047)
> +		offset = 2047;

Use clamp() rather than open coding.
However it may ake more sense to reject out of range values.

> +
> +	PM_RUNTIME_ACQUIRE_AUTOSUSPEND(dev, pm);
> +	ret = PM_RUNTIME_ACQUIRE_ERR(&pm);
> +	if (ret)
> +		return ret;
> +
> +	guard(mutex)(&st->lock);
> +
> +	switch (chan->channel2) {
> +	case IIO_MOD_X:
> +		/* OFFSET_USER4 register is shared */
> +		ret = inv_icm42607_mreg_read(st, INV_ICM42607_MREG1,
> +				INV_ICM42607_REG_OFFSET_USER4, &regval);
> +		if (ret)
> +			return ret;
> +
> +		hi = ((offset & 0xF00) >> 4) | (regval & 0x0F);
> +		lo = offset & 0xFF;
> +
> +		ret = inv_icm42607_mreg_write(st, INV_ICM42607_MREG1,
> +				INV_ICM42607_REG_OFFSET_USER4, hi);
> +		if (ret)
> +			return ret;
> +
> +		ret = inv_icm42607_mreg_write(st, INV_ICM42607_MREG1,
> +					      INV_ICM42607_REG_OFFSET_USER5, lo);
> +
> +		if (ret)
> +			return ret;

return here as well.

> +		break;
> +
> +	case IIO_MOD_Y:
> +		/* OFFSET_USER7 register is shared */
> +		ret = inv_icm42607_mreg_read(st, INV_ICM42607_MREG1,
> +					     INV_ICM42607_REG_OFFSET_USER7,
> +					     &regval);
> +		if (ret)
> +			return ret;
> +
> +		lo = offset & 0xFF;
> +		hi = ((offset & 0xF00) >> 8) | (regval & 0xF0);
> +
> +		ret = inv_icm42607_mreg_write(st, INV_ICM42607_MREG1,
> +					      INV_ICM42607_REG_OFFSET_USER7,
> +					      hi);
> +		if (ret)
> +			return ret;
> +
> +		ret = inv_icm42607_mreg_write(st, INV_ICM42607_MREG1,
> +					      INV_ICM42607_REG_OFFSET_USER6,
> +					      lo);
> +		if (ret)
> +			return ret;

		return inv_icm4...();
		
> +		break;
> +
> +	case IIO_MOD_Z:
> +		/* OFFSET_USER7 register is shared */
> +		ret = inv_icm42607_mreg_read(st, INV_ICM42607_MREG1,
> +					     INV_ICM42607_REG_OFFSET_USER7,
> +					     &regval);
> +		if (ret)
> +			return ret;
> +
> +		hi = ((offset & 0xF00) >> 4) | (regval & 0x0F);
> +		lo = offset & 0xFF;
> +
> +		ret = inv_icm42607_mreg_write(st, INV_ICM42607_MREG1,
> +					      INV_ICM42607_REG_OFFSET_USER7, hi);
> +		if (ret)
> +			return ret;
> +
> +		ret = inv_icm42607_mreg_write(st, INV_ICM42607_MREG1,
> +					      INV_ICM42607_REG_OFFSET_USER8, lo);
> +		if (ret)
> +			return ret;
> +		break;

Just return here. No point in breaking out of the switch then
immediately returning.

-- 
Jonathan Cameron <jonathan.cameron@xxxxxxxxxxxxxxxx>