[PATCH net] net: dsa: realtek: rtl8365mb: let the SerDes PLL settle after the data-path reset

[Stanislaw Pal]

The vendor DW8051 firmware waits ~98 ms after the BMCR data-path reset
(constant SGMII_TIMEOUT_98MS in Sgmii_Init[]) before any further SerDes
register access, giving the SerDes PLL and analog front-end time to
settle. Without the wait the SGMII link on the RTL8367S can come up
half-alive on cold boot: carrier up and RX passing traffic, TX
permanently dead (measured on a TP-Link Archer AX55 v1, IPQ5018).

Fixes: 0b577e2fe06c ("net: dsa: realtek: rtl8365mb: add SGMII support for RTL8367S")
Suggested-by: Mieczyslaw Nalewaj <namiltd@xxxxxxxxx>
Signed-off-by: Mieczyslaw Nalewaj <namiltd@xxxxxxxxx>
Signed-off-by: Stanislaw Pal <kuncy7@xxxxxxxxx>
---
--- a/drivers/net/dsa/realtek/rtl8365mb_main.c
+++ b/drivers/net/dsa/realtek/rtl8365mb_main.c
@@ -1408,6 +1408,14 @@ static int rtl8365mb_pcs_config(struct p
 	if (ret)
 		return ret;
 
+	/* The vendor DW8051 firmware waits ~98 ms after the data-path reset
+	 * (SGMII_TIMEOUT_98MS in Sgmii_Init[]) for the SerDes PLL and analog
+	 * front-end to settle before any further SerDes register access.
+	 * Without the wait the link can come up half-alive on cold boot:
+	 * carrier and RX fine, TX permanently dead.
+	 */
+	msleep(98);
+
 	/* Keep SGMII in-band autonegotiation disabled: the link parameters are
 	 * forced from rtl8365mb_pcs_link_up() instead.
 	 */