Re: [PATCH v2 1/1] ARM: dts: draeger: Add socfpga devicetree for Draeger's M48 board.

[Petko Manolov]

On 26-09-09 08:36:23, Krzysztof Kozlowski wrote:
> On 08/09/2026 13:10, Petko Manolov wrote:
> > Signed-off-by: Petko Manolov <petko.manolov@xxxxxxxxxxxx>
> 
> Please run scripts/checkpatch.pl on the patches and fix reported warnings.
> After that, run also 'scripts/checkpatch.pl --strict' on the patches and
> (probably) fix more warnings. Some warnings can be ignored, especially from
> --strict run, but the code here looks like it needs a fix. Feel free to get in
> touch if the warning is not clear.
> 
> 
> > ---
> >  .../devicetree/bindings/arm/altera.yaml       |   1 +
> >  arch/arm/boot/dts/intel/socfpga/Makefile      |   1 +
> >  .../socfpga/socfpga_cyclone5_draeger_m48.dts  | 130 ++++++++++++++++++
> >  3 files changed, 132 insertions(+)
> >  create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_draeger_m48.dts
> > 
> > diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml
> > index 3030cf46fe74..8ed1ba733510 100644
> > --- a/Documentation/devicetree/bindings/arm/altera.yaml
> > +++ b/Documentation/devicetree/bindings/arm/altera.yaml
> 
> Same comments. Binding should not be part of other patches.

Does this mean i should submit the bindings related patches first?

> > @@ -47,6 +47,7 @@ properties:
> >            - enum:
> >                - altr,socfpga-cyclone5-socdk
> >                - denx,mcvevk
> > +              - draeger,M48
> >                - ebv,socrates
> >                - macnica,sodia
> >                - novtech,chameleon96
> > diff --git a/arch/arm/boot/dts/intel/socfpga/Makefile b/arch/arm/boot/dts/intel/socfpga/Makefile
> > index 8df0976da01c..cdcea11abdfa 100644
> > --- a/arch/arm/boot/dts/intel/socfpga/Makefile
> > +++ b/arch/arm/boot/dts/intel/socfpga/Makefile
> > @@ -11,6 +11,7 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \
> >  	socfpga_arria10_mercury_aa1_st1_emmc.dtb \
> >  	socfpga_arria10_mercury_aa1_st1_qspi.dtb \
> >  	socfpga_arria10_mercury_aa1_st1_sdmmc.dtb \
> > +	socfpga_cyclone5_draeger_m48.dtb \
> >  	socfpga_cyclone5_mercury_sa1_pe1_emmc.dtb \
> >  	socfpga_cyclone5_mercury_sa1_pe1_qspi.dtb \
> >  	socfpga_cyclone5_mercury_sa1_pe1_sdmmc.dtb \
> > diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_draeger_m48.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_draeger_m48.dts
> > new file mode 100644
> > index 000000000000..423c76cd1d4a
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_draeger_m48.dts
> > @@ -0,0 +1,130 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + *  (C) Copyright 2020 Draeger and Licensors, info@xxxxxxxxxxx
> > + */
> > +#include "socfpga_cyclone5.dtsi"
> > +
> > +/ {
> > +	model = "Draeger M48 Cyclone V SoC";
> > +	compatible = "draeger,M48", "altr,socfpga-cyclone5", "altr,socfpga";
> > +
> > +	chosen {
> > +		bootargs = "earlyprintk";
> 
> That's not a mainline suitable argument, drop.

These DTs are meant for u-boot only usage, but OK, will drop the bootargs.


		Petko