Re: [PATCH 2/2] drm/msm/a6xx: Use CX AO Counter register for timestamp on a750 GPUs

[Connor Abbott]

On Wed, Sep 9, 2026 at 10:29 AM Neil Armstrong
<neil.armstrong@xxxxxxxxxx> wrote:
>
> On 9/9/26 15:24, Connor Abbott wrote:
> > On Wed, Sep 9, 2026 at 5:32 AM Neil Armstrong <neil.armstrong@xxxxxxxxxx> wrote:
> >>
> >> On 9/9/26 11:06, Konrad Dybcio wrote:
> >>> On 9/8/26 3:24 PM, Neil Armstrong wrote:
> >>>> The a750 uses the CX AO Counters instead of the GMU_ALWAYS_ON_COUNTER
> >>>> register on A6xx and other A7xx GPUs, use it when running a A750 GPU.
> >>>>
> >>>> Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
> >>>> ---
> >>>>    drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12 +++++++++---
> >>>>    1 file changed, 9 insertions(+), 3 deletions(-)
> >>>>
> >>>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> >>>> index f9de9329dee3..081e79ea4652 100644
> >>>> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> >>>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> >>>> @@ -23,9 +23,15 @@ static u64 a6xx_gmu_get_timestamp(struct msm_gpu *gpu)
> >>>>       u64 count_hi, count_lo, temp;
> >>>>
> >>>>       do {
> >>>> -            count_hi = gmu_read(&a6xx_gpu->gmu, REG_A6XX_GMU_ALWAYS_ON_COUNTER_H);
> >>>> -            count_lo = gmu_read(&a6xx_gpu->gmu, REG_A6XX_GMU_ALWAYS_ON_COUNTER_L);
> >>>> -            temp = gmu_read(&a6xx_gpu->gmu, REG_A6XX_GMU_ALWAYS_ON_COUNTER_H);
> >>>> +            if (adreno_is_a750_family(adreno_gpu)) {
> >>>> +                    count_hi = gmu_read(&a6xx_gpu->gmu, REG_A7XX_GMU_CX_AO_COUNTER_H);
> >>>> +                    count_lo = gmu_read(&a6xx_gpu->gmu, REG_A7XX_GMU_CX_AO_COUNTER_L);
> >>>> +                    temp = gmu_read(&a6xx_gpu->gmu, REG_A7XX_GMU_CX_AO_COUNTER_H);
> >>>
> >>> KGSL apparently *writes* the system time to these registers, is that
> >>> an idiosyncrasy regarding how the vendor userland drivers then use
> >>> this counter?
> >>
> >> This is a GMU counter, no sure why & how KGSL or freedreno would write anything to it...
> >
> > It is writeable. This is part of implementing
> > VK_KHR_calibrated_timestamps. The idea is that when the GPU suspends
> > and resumes, we keep track of how many ticks it would've taken and
> > then pretend to advance the counter by writing the CX counter (after
> > powering on CX but before powering on GX which initializes the normal
> > GMU counter).
> >
> > Note that VK_KHR_calibrated_timestamps worked initially on turnip but
> > the tests started failing with v6.19. I haven't bisected yet but my
> > guess is CX was never actually collapsing for whatever reason and we
> > made it collapse hence breaking the tests. So we probably do need
> > this.
>
> OK thanks for the detail! Today it's only used for perfetto, but still
> on A750 a different register is used for this purpose.
>
> Neil

Well technically no, today this function is also used by
VK_KHR_calibrated_timestamps on turnip and today it's broken because
of a kernel regression...

Connor

>
> >
> > Connor
> >
> >>
> >>>
> >>> Konrad
> >>>
> >>> P.S. looks like a8xx also has this counter
> >>>
> >>
>