Re: [PATCH v24 03/15] mmc: renesas_sdhi: Add clk_mask field to support flexible clock divider widths

[wsa+renesas]

> If (host->mmc->actual_clock < 512), we get clock=0.
> 
> 
> In this case, shall we set divider to maximum and skip the loop?
> So that clk runs with maximum allowable divider value.
> 
> Please share your thoughts on this.
> 
> Or
> 
> Do you have different solution, please let me know?

I hope I am not confusing things. What about

	clock = max(host->mmc->actual_clock / 512, 1);

? The loop should return then the smallest divider which makes sense for
a super-small actual_clock (which is super unlikely but still)?

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