[PATCH] drm/tyr: reduce size of doorbell array

[Deborah Brouwer]

Currently the number of doorbells is set to 64 which is an architectural
maximum for the Mali GPU major v10 supported by Tyr. Since each doorbell
needs a 64 KiB page, the doorbell array alone would need 4 MiB of register
memory. Since the doorbell array starts at offset 0x80000, its exclusive
end would be 0x480000, but the rk3588 device that Tyr is compatible with
only provides a 2 MiB iomem region in total.

Reduce the number of doorbells so that they fit into the rk3588 iomem
region. This is consistent with Panthor’s doorbell id assignment.
Doorbell 0 is the global doorbell. Panthor assigns the remaining doorbells
to the active command stream group (CSG) slots. The number of slots is
capped at 16 (MAX_CSG_PRIO + 1). Therefore Panthor uses a maximum of 17
doorbells. The 17 doorbell pages span 0x110000 bytes. Since the doorbell
array starts at offset 0x80000 its exclusive end is 0x190000 and so fits
within the 2 MiB register region.

Signed-off-by: Deborah Brouwer <deborah.brouwer@xxxxxxxxxxxxx>
---
 drivers/gpu/drm/tyr/regs.rs | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/tyr/regs.rs b/drivers/gpu/drm/tyr/regs.rs
index 0c419c4e1186..68701c39aee2 100644
--- a/drivers/gpu/drm/tyr/regs.rs
+++ b/drivers/gpu/drm/tyr/regs.rs
@@ -1802,7 +1802,10 @@ pub(crate) mod doorbell_block {
     use crate::driver::TyrRegisters;
 
     /// Number of doorbells available.
-    pub(crate) const NUM_DOORBELLS: usize = 64;
+    /// The architectural maximum is 64 but this full array does not
+    /// fit in the 2 MiB iomem region. Panthor currently uses a maximum of
+    /// 17 doorbells so do the same here.
+    pub(crate) const NUM_DOORBELLS: usize = 17;
 
     /// Doorbell block stride (64KiB).
     ///

---
base-commit: 73e5616f3d197c1af5a04a481fe0f13aa3913bd1
change-id: 20260910-b4-doorbell-224966fa0a29

Best regards,
-- 
Deborah Brouwer <deborah.brouwer@xxxxxxxxxxxxx>