Re: (subset) [PATCH v10 0/5] Add QMP PCIe Multi-PHY support

[Bjorn Andersson]

On Tue, 25 Aug 2026 19:59:19 -0700, Qiang Yu wrote:
> Some QMP PCIe PHY hardware blocks can be configured through a link-mode
> register into different link topologies, such as a single wide link, or
> multiple independent narrower links (e.g. x8 or x4+x4 mode on the Glymur
> PCIe3 PHY).
> 
> Earlier revisions tried to extend the existing single-instance
> phy-qcom-qmp-pcie.c driver to cover this hardware. That added a large
> amount of conditional, multi-PHY logic to a driver whose data model
> assumes one PHY per node.
> 
> [...]

Applied, thanks!

[5/5] arm64: defconfig: Enable QMP PCIe Multi-PHY driver
      commit: 6708289cc13812cebedcc396a42f62d3f92b2dbd

Best regards,
-- 
Bjorn Andersson <andersson@xxxxxxxxxx>