Re: [PATCH net v2] r8169: don't enable chip LTR when the platform has not enabled LTR
From: Heiner Kallweit
Date: Fri Sep 11 2026 - 09:22:55 EST
On 11.09.2026 15:00, Yogesh Gaur wrote:
> On Fri, Sep 11, 2026 at 1:03 AM Heiner Kallweit <hkallweit1@xxxxxxxxx> wrote:
>>
>> On 10.09.2026 15:01, Yogesh Gaur wrote:
>>> rtl_enable_ltr() programs the MAC to generate LTR messages - ALDPS_LTR_EN,
>>>
>>
>> Empty lines, mail formatting issue?
> Yes, I would correct it in v3.
>
>>
>>> LTR_SNOOP_EN, LTR_OBFF_LOCK_EN, plus LINK_SPEED_CHANGE_EN on
>>>
>>> RTL8125/RTL8126/RTL8127 - and rtl_hw_aspm_clkreq_enable() calls it on
>>>
>>> every ASPM enable, then goes on to let the chip trigger L1.2.
>>>
>>>
>>>
>>> The only gate is tp->aspm_manageable, which records that the OS is allowed
>>>
>>> to control ASPM. It says nothing about LTR. LTR is a separate PCIe
>>>
>>> capability that only works if every device on the path to the root port
>>>
>>> supports it. The PCI core works that out in pci_configure_ltr() and
>>>
>>> records the result in pci_dev->ltr_path; per PCIe r6.0 sec 7.5.3.16 a
>>>
>>> function must not issue LTR messages while LTR Mechanism Enable is clear.
>>>
>>>
>>>
>>> So on a platform whose hierarchy has no LTR path, the driver tells the
>>>
>>> chip to start sending LTR messages nothing will honour, and ties ALDPS -
>>>
>>> the PHY's link-down power saving - to them. A report against RTL8125B
>>>
>>> (rev 05, firmware rtl8125b-2_0.0.2) in a mini PC shows the effect: 291
>>
>> Did you verify that this is caused by LTR messages, and not by any other
>> root cause?
>>
>>>
>>> link down/up transitions in one eight-hour boot, with repeated downshifts
>>>
>>> to 100Mbps, against four transitions at boot and then a stable link on
>>>
>>> the kernel before the LTR change.
>>>
>>>
>>>
>>> Gate the chip's LTR programming on pci_dev->ltr_path. That field lives
>>>
>>> inside CONFIG_PCIEASPM, and without ASPM support there is nothing here to
>>>
>>> enable LTR for, so compile the function out in that configuration.
>>>
>>>
>>>
>>> Note this does change CONFIG_PCIEASPM=n builds, which used to program
>>>
>>> chip LTR unconditionally: pci_disable_link_state() is a stub that returns
>>>
>>> success there, so tp->aspm_manageable ends up set. The PCI core does not
>>>
>>> configure LTR in that configuration either.
>>>
>>>
>>>
>>> Fixes: 9ab94a32af70 ("r8169: enable LTR support")
>>>
>>> Closes: https://bugzilla.redhat.com/show_bug.cgi?id=2529752
>>
>> Did you verify that your patch fixes the reported issue? Or do you
>> just assume this? Because in the bug comment history I don't see
>> a statement that issue has been resolved.
> I don't have a board with me, hence have not verified it. I did a
> compile check only.
If it's not verified that your patch fixes the reported issue, better
remove the Closes line.
>>
>>> Assisted-by: LLM
>>>
>>> Signed-off-by: Yogesh Gaur <yogeshgaur.83@xxxxxxxxx>
>>>
>>> ---
>>>
>>> v2:
>>>
>>> - Gate on pci_dev->ltr_path instead of reading PCI_EXP_DEVCTL2 directly,
>>>
>>> and compile rtl_enable_ltr() out for CONFIG_PCIEASPM=n, where that
>>>
>>> field does not exist and there is nothing to enable LTR for.
>>>
>>> Suggested by Heiner Kallweit.
>>>
>>> - Commit message notes the resulting change for CONFIG_PCIEASPM=n builds.
>>>
>>> - No change to the RTL8125 register programming itself.
>>>
>>>
>>>
>>> v1: https://lore.kernel.org/all/20260909110554.1977-1-yogeshgaur.83@xxxxxxxxx/
>>>
>>>
>>>
>>> drivers/net/ethernet/realtek/r8169_main.c | 13 +++++++++++++
>>>
>>> 1 file changed, 13 insertions(+)
>>>
>>>
>>>
>>> diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
>>>
>>> index ec4fc21fa21f..05f7a44aff01 100644
>>>
>>> --- a/drivers/net/ethernet/realtek/r8169_main.c
>>>
>>> +++ b/drivers/net/ethernet/realtek/r8169_main.c
>>>
>>> @@ -3035,8 +3035,16 @@ static void rtl_disable_exit_l1(struct rtl8169_private *tp)
>>>
>>> }
>>>
>>> }
>>>
>>>
>>>
>>> +#ifdef CONFIG_PCIEASPM
>>>
>>> static void rtl_enable_ltr(struct rtl8169_private *tp)
>>>
>>> {
>>>
>>> + /* The chip must not issue LTR messages unless LTR is enabled on the
>>>
>>> + * whole path up to the root port. pci_configure_ltr() works that out
>>>
>>> + * and records the result in pci_dev->ltr_path.
>>>
>>> + */
>>>
>>> + if (!tp->pci_dev->ltr_path)
>>
>> Simpler would be:
>> if (!IS_ENABLED(CONFIG_PCIEASPM) || !tp->pci_dev->ltr_path)
>>
> I tried that and it does not build, because ltr_path itself is declared
> inside the #ifdef:
>
> include/linux/pci.h:443
> #ifdef CONFIG_PCIEASPM
> struct pcie_link_state *link_state;
> unsigned int aspm_l0s_support:1;
> unsigned int aspm_l1_support:1;
> unsigned int ltr_path:1;
> #endif
>
> IS_ENABLED() is a C expression, so the member reference still has to
> compile even when the left operand is 0:
>
> drivers/net/ethernet/realtek/r8169_main.c: In function 'rtl_enable_ltr':
> error: 'struct pci_dev' has no member named 'ltr_path'
> if (!IS_ENABLED(CONFIG_PCIEASPM) || !tp->pci_dev->ltr_path)
>
Right, ofc ..
>> Then you don't need the stub function.
>>
> You are right that the stub function should go, though. v3 drops it and
> keeps a single rtl_enable_ltr() with the guard inline:
>
> static void rtl_enable_ltr(struct rtl8169_private *tp)
> {
> /* comment */
> #ifdef CONFIG_PCIEASPM
> if (!tp->pci_dev->ltr_path)
> return;
> #else
> return;
> #endif
LGTM
>>>
>>> + return;
>>>
>>> +
>>>
>>> switch (tp->mac_version) {
>>>
>>> case RTL_GIGA_MAC_VER_80:
>>>
>>> r8168_mac_ocp_write(tp, 0xcdd0, 0x9003);
>>>
>>> @@ -3120,6 +3128,11 @@ static void rtl_enable_ltr(struct rtl8169_private *tp)
>>>
>>> /* chip can trigger LTR */
>>>
>>> r8168_mac_ocp_modify(tp, LTR_OBFF_LOCK, 0x0003, LTR_OBFF_LOCK_EN);
>>>
>>> }
>>>
>>> +#else
>>>
>>> +static void rtl_enable_ltr(struct rtl8169_private *tp)
>>>
>>> +{
>>>
>>> +}
>>>
>>> +#endif
>>>
>>>
>>>
>>> static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable)
>>>
>>> {
>>>
>>