[PATCH 13/17] phy: qcom: edp: Add Nord spread-spectrum clocking configuration callback

From: Nabige Aala

Date: Fri Sep 11 2026 - 11:50:13 EST


From: Ritesh Kumar <ritesh.kumar@xxxxxxxxxxxxxxxx>

Nord requires different SSC register values compared to existing SoCs.
Add qcom_edp_com_configure_ssc_nord() which programs SSC_PER1/2 with
fixed values and link-rate-dependent SSC_STEP_SIZE1/2 for RBR, HBR,
HBR2 and HBR3, per HPG Table 2-9.

Signed-off-by: Ritesh Kumar <ritesh.kumar@xxxxxxxxxxxxxxxx>
Signed-off-by: Nabige Aala <nabige.aala@xxxxxxxxxxxxxxxx>
---
drivers/phy/qualcomm/phy-qcom-edp.c | 43 +++++++++++++++++++++++++++++++++++++
1 file changed, 43 insertions(+)

diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c
index ec4220cffe69..a0f4b12e561e 100644
--- a/drivers/phy/qualcomm/phy-qcom-edp.c
+++ b/drivers/phy/qualcomm/phy-qcom-edp.c
@@ -1645,6 +1645,49 @@ static int qcom_edp_com_bias_en_clkbuflr_nord(const struct qcom_edp *edp)
}


+/*
+ * Nord SSC settings per HPG Table 2-9.
+ * SSC_PER1 = 0x6b and SSC_PER2 = 0x02 are fixed across all link rates.
+ * SSC_STEP_SIZE1/2 are link-rate dependent.
+ */
+static int qcom_edp_com_configure_ssc_nord(const struct qcom_edp *edp)
+{
+ const struct phy_configure_opts_dp *dp_opts = &edp->dp_opts;
+ u32 step1;
+ u32 step2;
+
+ switch (dp_opts->link_rate) {
+ case 1620:
+ step1 = 0x83;
+ step2 = 0x02;
+ break;
+
+ case 2700:
+ case 5400:
+ step1 = 0x18;
+ step2 = 0x02;
+ break;
+
+ case 8100:
+ step1 = 0x5b;
+ step2 = 0x02;
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ writel(0x01, edp->pll + DP_QSERDES_V8_COM_SSC_EN_CENTER);
+ writel(0x00, edp->pll + DP_QSERDES_V8_COM_SSC_ADJ_PER1);
+ writel(0x6b, edp->pll + DP_QSERDES_V8_COM_SSC_PER1);
+ writel(0x02, edp->pll + DP_QSERDES_V8_COM_SSC_PER2);
+ writel(step1, edp->pll + DP_QSERDES_V8_COM_SSC_STEP_SIZE1_MODE0);
+ writel(step2, edp->pll + DP_QSERDES_V8_COM_SSC_STEP_SIZE2_MODE0);
+
+ return 0;
+}
+
+
static const struct of_device_id qcom_edp_phy_match_table[] = {
{ .compatible = "qcom,glymur-dp-phy", .data = &glymur_phy_cfg, },
{ .compatible = "qcom,sa8775p-edp-phy", .data = &sa8775p_dp_phy_cfg, },

--
2.34.1