Re: [PATCH 0/4] clk: sunxi-ng: a523: Fix single-divider clocks

[Chen-Yu Tsai]

On Sun, 06 Sep 2026 15:06:37 +0800, Junhui Liu wrote:
> Sashiko pointed out two issues in my series adding clock driver support
> for the Allwinner A733 SoC [1][2].
> 
> First, ccu_mp_set_rate() generates an invalid mask when an MP clock is
> defined with a zero-width P divider, clearing unrelated register fields.
> Second, ccu_mp_set_rate() does not handle CCU_FEATURE_UPDATE_BIT, so
> divider changes are not latched by the hardware.
> 
> [...]

Applied to sunxi/clk-for-7.4 in sunxi, thanks!

[1/4] clk: sunxi-ng: div: Add feature support to M clock macro
      https://git.kernel.org/sunxi/linux/c/da543a093f65
[2/4] clk: sunxi-ng: sun55i-a523-ccu: Use M-only clocks for MBUS, IOMMU and DRAM
      https://git.kernel.org/sunxi/linux/c/88735a2ffbea
[3/4] clk: sunxi-ng: sun55i-a523-ccu: Use P-only clocks for high-speed timers
      https://git.kernel.org/sunxi/linux/c/4b41d0ffa9d9
[4/4] clk: sunxi-ng: sun55i-a523-r-ccu: Use P-only clocks for timers
      https://git.kernel.org/sunxi/linux/c/b260db91603a

Best regards,
-- 
Chen-Yu Tsai <wens@xxxxxxxxxx>