Re: [PATCH 2/5] arm64: dts: qcom: nord: Add the USB controller nodes
From: Konrad Dybcio
Date: Mon Sep 14 2026 - 04:39:42 EST
On 9/11/26 4:20 PM, Shawn Guo wrote:
> From: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxxxxxxxx>
>
> Add the base nodes for the three DWC3 USB controllers. These carry only
> the SoC-invariant properties and are disabled by default. The extension
> for the embedded Nord variant and relevant board files will add the
> platform resources and enable them.
[...]
> + usb_2: usb@a200000 {
> + compatible = "qcom,nord-dwc3",
> + "qcom,snps-dwc3";
> + reg = <0x0 0x0a200000 0x0 0xfc100>;
> +
> + interrupts-extended = <&intc GIC_SPI 910 IRQ_TYPE_LEVEL_HIGH>,
> + <&intc GIC_SPI 907 IRQ_TYPE_LEVEL_HIGH>,
> + <&pdc 8 IRQ_TYPE_EDGE_BOTH>,
> + <&pdc 7 IRQ_TYPE_EDGE_BOTH>;
> + interrupt-names = "dwc_usb3",
> + "pwr_event",
> + "dp_hs_phy_irq",
> + "dm_hs_phy_irq";
There's also a hs_phy_irq @ SPI 908
> +
> + iommus = <&apps_smmu_0 0x14e0 0x0>;
> +
> + dma-coherent;
> + wakeup-source;
> +
> + snps,dis-u1-entry-quirk;
> + snps,dis-u2-entry-quirk;
This is a suspiciously short list of quirks..
> +
> + maximum-speed = "high-speed";
> +
> + qcom,select-utmi-as-pipe-clk;
> +
> + status = "disabled";
> + };
> +
> + usb_1: usb@a400000 {
> + compatible = "qcom,nord-dwc3",
> + "qcom,snps-dwc3";
> + reg = <0x0 0x0a400000 0x0 0xfc100>;
> +
> + interrupts-extended = <&intc GIC_SPI 917 IRQ_TYPE_LEVEL_HIGH>,
> + <&intc GIC_SPI 918 IRQ_TYPE_LEVEL_HIGH>,
> + <&pdc 13 IRQ_TYPE_EDGE_BOTH>,
> + <&pdc 12 IRQ_TYPE_EDGE_BOTH>,
> + <&pdc 41 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "dwc_usb3",
> + "pwr_event",
> + "dp_hs_phy_irq",
> + "dm_hs_phy_irq",
> + "ss_phy_irq";
hs_phy_irq @ SPI 919
> +
> + iommus = <&apps_smmu_0 0x15c0 0x0>;
> +
> + dma-coherent;
> + wakeup-source;
> +
> + snps,dis-u1-entry-quirk;
> + snps,dis-u2-entry-quirk;
> +
> + status = "disabled";
> + };
> +
> + usb_0: usb@a600000 {
> + compatible = "qcom,nord-dwc3",
> + "qcom,snps-dwc3";
> + reg = <0x0 0x0a600000 0x0 0xfc100>;
> +
> + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
> + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
> + <&pdc 14 IRQ_TYPE_EDGE_BOTH>,
> + <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
> + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "dwc_usb3",
> + "pwr_event",
> + "dp_hs_phy_irq",
> + "dm_hs_phy_irq",
> + "ss_phy_irq";
hs_phy_irq @ SPI 131
Konrad