Re: [PATCH v2 3/7] dt-bindings: usb: Add qcom,sa8255p-dwc3 for firmware-managed resources
From: Faisal Hassan
Date: Wed Sep 16 2026 - 07:31:33 EST
On 07-09-2026 02:38 pm, Krzysztof Kozlowski wrote:
On Thu, Sep 03, 2026 at 09:08:23PM +0530, Faisal Hassan wrote:Hi Krzysztof,
On Qualcomm automotive SoC sa8255p, platform resources like clocks,Why is this flexible?
interconnects, resets, regulators and GDSC are abstracted and managed
collectively by firmware.
Add a new binding file for firmware-managed USB controllers where
access to these resources is exposed as two power domains:
- Power domain: Controls power supply (GDSC) to the USB controller
- Bus domain: Controls clocks and interconnects for data transfer
The binding makes power-domains and power-domain-names properties mandatory
for firmware-managed platforms, while excluding the clocks property since
clocks are managed through the power domains.
Co-developed-by: Sriram Dash <sriram.dash@xxxxxxxxxxxxxxxx>
Signed-off-by: Sriram Dash <sriram.dash@xxxxxxxxxxxxxxxx>
Signed-off-by: Faisal Hassan <faisal.hassan@xxxxxxxxxxxxxxxx>
---
.../bindings/usb/qcom,sa8255p-dwc3.yaml | 123 ++++++++++++++++++
1 file changed, 123 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/qcom,sa8255p-dwc3.yaml
diff --git a/Documentation/devicetree/bindings/usb/qcom,sa8255p-dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,sa8255p-dwc3.yaml
new file mode 100644
index 000000000000..c6db7bcf4981
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/qcom,sa8255p-dwc3.yaml
@@ -0,0 +1,123 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/qcom,sa8255p-dwc3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SA8255P USB3 Controller with Firmware-Managed Resources
+
+maintainers:
+ - Wesley Cheng <wesley.cheng@xxxxxxxxxxxxxxxx>
+ - Faisal Hassan <faisal.hassan@xxxxxxxxxxxxxxxx>
+
+description:
+ USB controller on Qualcomm SA8255P automotive SoC where platform resources
+ such as clocks, interconnects, resets, regulators and the GDSC are
+ abstracted and managed collectively by firmware through SCMI (System
+ Control and Management Interface).
+
+ Access to these firmware-managed resources is exposed as two power
+ domains, one gating the power supply (GDSC) to the controller, and one
+ gating the clocks and interconnects used for data transfer.
+
+properties:
+ compatible:
+ const: qcom,sa8255p-dwc3
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ minItems: 1
+ maxItems: 6
+Why is this flexible even more, allowing completely random names?
+ interrupt-names:
+ minItems: 1
+ maxItems: 6
+Look at other bindings how they do it.
+ power-domains:
+ description: |
+ Power domains are provided by SCMI (System Control and Management
+ Interface). See Documentation/devicetree/bindings/firmware/arm,scmi.yaml
+ for details.
+
+ Exactly two power domains must be specified:
+ - "power": controls power supply (GDSC) to the USB controller
+ - "bus": controls clocks and interconnects used for data transfer
I finished here, because you would avoid all above questions if you just
copied recently added or reviewed on the list SA8xxx binding. You did
not, so basically I expect more of unexpected code, which is pointless
to review. Just open existing files...
Best regards,
Krzysztof
You're right, I should have checked the existing sa8255p bindings before sending this. I went back and matched it against qcom,sa8255p-geni-uart.yaml. Will fix in v3:
- interrupts/interrupt-names: replaced the open range with a concrete items: list, minItems: 5/maxItems: 6.
- power-domains/power-domain-names and resets: dropped the extra per-property descriptions, now just bare minItems/maxItems/items like qcom,sa8255p-geni-uart.yaml, with the explanation kept in the top-level description.
Thanks,
Faisal