Re: [PATCH v2 3/7] arm64: dts: freescale: Add Lino iMX93

[Francesco Dolcini]

Hello Andrew,

On Wed, Sep 16, 2026 at 02:27:54PM +0200, Andrew Lunn wrote:
> > I looked into the specific ethernet phy used here, TI DP83867, and
> > I would say that the falling edge interrupt should be safe on this
> > specific board/phy.
> 
> https://www.ti.com/lit/ds/symlink/dp83867ir.pdf
> 
> Page 7:
> 
>   INTERRUPT: This pin can be programmed as an interrupt output instead
>   of a Power down input. In this mode, Interrupts is asserted low
>   using this pin.
> 
> Also:
> 
>   When operating this pin as an interrupt, the pin is an open-drain
>   architecture.
> 
> This allows you to connect multiple PHYs to one SoC interrupt, shared
> interrupts, which again needs level interrupts.
> 
> So the datasheet says it is active low.

Yes, indeed. I was aware of it, I was just assuming this as a shared
understanding - sorry. My comment was supposed to be read as, "even if
this is a level interrupt, using it as edge is safe because of this
reasons, ...". In addition, in this specific board, the interrupt is not
shared, otherwise it could not work at all.

> > What do you think? *IF* my reasoning is correct I would suggest to keep
> > the code as it is now.
> 
> If you decide to stay with edge, i suggest you put a comment in DT,
> something like:
> 
> # The PHY data sheet says the interrupt is active low, but the
> # interrupt controller does not support level interrupts. Use it as
> # falling edge and hope for the best.

"hope for the best" is not what I plan for. Given the specific of this
ethernet phy I do not see any race condition, as I tried to describe in
the previous email. If you believe that my explanation is flowed and
there is a possible race condition please let me know and I would rather
go for polling.

And again, thanks for the review, I appreciate it. The goal is to have
working ethernet with the interrupt, and, **IF** not possible, working
ethernet is more important than the interrupt :-)

Francesco