Re: [PATCH v3 06/10] dt-bindings: ufs: Add NXP S32N79 UFS host controller

From: Frank Li

Date: Wed Sep 16 2026 - 13:00:40 EST


On Wed, Sep 16, 2026 at 10:44:07AM +0200, Larisa Grigore wrote:
> Document the UFS host controller on the NXP S32N79 SoC.
>
> Signed-off-by: Larisa Grigore <larisa.grigore@xxxxxxxxxxx>
> ---
> .../bindings/ufs/nxp,s32n79-ufshc.yaml | 61 +++++++++++++++++++
> 1 file changed, 61 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/ufs/nxp,s32n79-ufshc.yaml
>
> diff --git a/Documentation/devicetree/bindings/ufs/nxp,s32n79-ufshc.yaml b/Documentation/devicetree/bindings/ufs/nxp,s32n79-ufshc.yaml
> new file mode 100644
> index 000000000000..2bede50a9b6f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ufs/nxp,s32n79-ufshc.yaml
> @@ -0,0 +1,61 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/ufs/nxp,s32n79-ufshc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP S32N79 Universal Flash Storage (UFS) Controller
> +
> +maintainers:
> + - Larisa Grigore <larisa.grigore@xxxxxxxxxxx>
> +
> +# Select only our matches, not all jedec,ufs
> +select:
> + properties:
> + compatible:
> + contains:
> + const: nxp,s32n79-ufshc
> + required:
> + - compatible
> +
> +properties:
> + compatible:
> + items:
> + - const: nxp,s32n79-ufshc
> + - const: jedec,ufs-2.0

I have not seen driver parse it even though other vendor use it at dts
and yaml.

leave dt team to comment it.

Reviewed-by: Frank Li <Frank.Li@xxxxxxx>
> +
> + reg:
> + items:
> + - description: UFS Host Controller registers
> + - description: System Control Module registers
> +
> + reg-names:
> + items:
> + - const: ufshc
> + - const: scm
> +
> + clocks:
> + maxItems: 1
> + description: UFS core clock
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - clocks
> +
> +allOf:
> + - $ref: ufs-common.yaml
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + ufshc@4ac80000 {
> + compatible = "nxp,s32n79-ufshc", "jedec,ufs-2.0";
> + reg = <0x4ac80000 0x1000>, <0x4ac40000 0x1000>;
> + reg-names = "ufshc", "scm";
> + interrupt-parent = <&irqsteer_coss>;
> + interrupts = <211>;
> + clocks = <&clks 0x92>;
> + };
> --
> 2.43.0\
>
>