Re: [PATCH] gpio: mvebu: keep resume masks within the irqchip cache

[Linus Walleij]

On Sun, Sep 13, 2026 at 12:19 AM Rosen Penev <rosenp@xxxxxxxxx> wrote:

> mvebu_gpio_resume() writes the edge/level mask registers saved at
> suspend time straight back to hardware, bypassing the irqchip's
> mask_cache_priv.  genirq skips mask_irq() for a line it already
> considers masked, so restoring a bit in hardware that genirq thinks
> is still masked leaves that line unmasked behind genirq's back.  An
> asserted level line then has nobody to ack it, and the moment
> interrupts are re-enabled the chained handler storms, hanging resume.
>
> AND the restored mask values with the matching irqchip mask cache so
> only lines genirq currently considers unmasked are unmasked again.
> Read the caches under gc->lock to keep them consistent with the
> mask/unmask handlers.
>
> Tested on Helios4 5 suspend cycles woken by magic packet, no hang;
> mvebu_gpio_resume() returns in 6 usecs.
>
> Assisted-by: LLM
> Signed-off-by: Rosen Penev <rosenp@xxxxxxxxx>

Reviewed-by: Linus Walleij <linusw@xxxxxxxxxx>

Yours,
Linus Walleij