Re: [PATCH v8 5/8] KVM: x86/pmu: Support PERF_METRICS MSR in mediated vPMU

[Chen, Zide]

On 8/17/2026 1:31 PM, Zide Chen wrote:
> @@ -395,6 +400,14 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>  		if (pmu->fixed_ctr_ctrl != data)
>  			reprogram_fixed_counters(pmu, data);
>  		break;
> +	case MSR_PERF_METRICS:
> +		/*
> +		 * Bits [63:32] are ignored on hardware that supports only
> +		 * level-1 metrics, but may be valid on hardware that supports
> +		 * level-2 metrics. Preserve guest writes verbatim.
> +		 */

That comment isn't correct. I've confirmed that MSR_PERF_METRICS[63:32]
isn't simply ignored on hardware that implements only the four level-1
Topdown metrics. Those bits are reserved, and KVM should reject non-zero
writes.

I'll post a fix in the next version. KVM will get the number of Topdown
metric events supported by the host CPU from perf/x86 and derive the
MSR_PERF_METRICS reserved-bit mask from that count, using it to reject
invalid writes.