Re: [PATCH] PCI: qcom: Honor IOMMU provider's #iommu-cells in qcom_pcie_config_sid_1_9_0()
From: Manivannan Sadhasivam
Date: Thu Sep 17 2026 - 02:00:38 EST
On Mon, 07 Sep 2026 16:33:49 +0200, Manivannan Sadhasivam wrote:
> qcom_pcie_config_sid_1_9_0() reads the "iommu-map" property as an array
> of fixed four-word {rid-base, phandle, sid, rid-len} entries to program
> the BDF to SID translation table. But that layout only holds for an
> IOMMU with '#iommu-cells = <1>'. The PCIe SMMUs on these SoCs use
> '#iommu-cells = <2>' (SID and mask), so per the pci-iommu binding each
> entry is really five cells long.
>
> [...]
Applied, thanks!
[1/1] PCI: qcom: Honor IOMMU provider's #iommu-cells in qcom_pcie_config_sid_1_9_0()
commit: 626acf6efc69c666ffee50bf18e7b95e68670c6a
Best regards,
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