Re: [PATCH v9 3/6] media: dt-bindings: Add Amlogic V4L2 video decoder
From: Zhentao Guo
Date: Thu Sep 17 2026 - 02:10:39 EST
On 17/09/2026 05:07, Zhentao Guo wrote:Got it, thanks!
Hi Krzysztof,So everything could be called consistently "dos", "vdec" and "hvdec" in
On Mon, Sep 14, 2026 at 04:10:20PM +0800, Zhentao Guo wrote:OK,got it.
Describe the initial support for the V4L2 stateless video decoderDrop driver. Describe the hardware instead.
driver used with the Amlogic S4 (S805X2) platform.
To explain this, I would like to show you the structure diagram of theSigned-off-by: Zhentao Guo <zhentao.guo@xxxxxxxxxxx>Drop "core_" from both... or rather some consistency would be more
---
.../devicetree/bindings/media/amlogic,s4-vdec.yaml | 114 +++++++++++++++++++++
1 file changed, 114 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/amlogic,s4-vdec.yaml b/Documentation/devicetree/bindings/media/amlogic,s4-vdec.yaml
new file mode 100644
index 000000000000..d350b3e68a38
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/amlogic,s4-vdec.yaml
@@ -0,0 +1,114 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2025 Amlogic, Inc. All rights reserved
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/amlogic,s4-vdec.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic Video Decode Accelerator
+
+maintainers:
+ - Zhentao Guo <zhentao.guo@xxxxxxxxxxx>
+
+description:
+ The Video Decoder Accelerator present on Amlogic SOCs.
+ It supports stateless h264 decoding.
+
+properties:
+ compatible:
+ const: amlogic,s4-vdec
+
+ reg:
+ maxItems: 2
+
+ reg-names:
+ items:
+ - const: dos
+ - const: dmc
+
+ interrupts:
+ maxItems: 2
+
+ interrupt-names:
+ items:
+ - const: core_hvdec
+ - const: core_vdec
useful. Below you call them core_v and core_h, but there is also:
+core dos?
+ clocks:
+ items:
+ - description: Clock for dos core
Amlogic hardware decoder IP:
+-----------+------------------------+
| | |
| | vdec |
| | |
| dos +------------------------+
| | |
| | hvdec |
| | |
+-----------+------------------------+
The IP consists of three cores. Dos core is in the front of the IP,
which controls the rest two cores. The actual hardware decoding is
handled by the two cores vdec and hvdec.
Each of the three cores has its own independent clock source.
all properties (clocks, interrupts etC).
Best regards,
Krzysztof
BRs
Zhentao