Re: [PATCH] pinctrl: qcom: nord: fix GPIO interrupt target width
From: Bartosz Golaszewski
Date: Thu Sep 17 2026 - 06:08:28 EST
On Wed, 16 Sep 2026 16:57:20 +0800, Zhangfei Gao wrote:
> The TARGET_PROC field in the Nord GPIO_INTR_CFG registers occupies bits
> 11:8. Describe it as four bits wide so the common Qualcomm pinctrl code
> clears the complete field before routing an interrupt to the application
> processor.
>
> Without intr_target_width, the common code uses its three-bit default
> mask. Since GPIO_INTR_CFG resets with TARGET_PROC set to 0xf (NONE), bit
> 11 remains set when the driver programs HMSS target 3. The resulting
> target is 0xb (HPASS_DSP_1), observed as an interrupt configuration value
> of 0xb1b instead of 0x31b.
>
> [...]
Applied, thanks!
[1/1] pinctrl: qcom: nord: fix GPIO interrupt target width
https://git.kernel.org/brgl/c/68ab4a6a84b92f52650508acb60317eb76454250
Best regards,
--
Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxxxxxxxx>