[PATCH v2 2/3] arm64: dts: imx8mm-var-dart: add TPM support
From: Stefano Radaelli
Date: Thu Sep 17 2026 - 12:36:58 EST
From: Stefano Radaelli <stefano.r@xxxxxxxxxxxxx>
Add support for the TPM available on the Variscite DART-MX8M-MINI SOM.
Co-developed-by: Nate Drude <nate.d@xxxxxxxxxxxxx>
Signed-off-by: Nate Drude <nate.d@xxxxxxxxxxxxx>
Signed-off-by: Stefano Radaelli <stefano.r@xxxxxxxxxxxxx>
---
v1->v2:
- Add tpm pinctrl
- Add comment on tpm reset line
.../boot/dts/freescale/imx8mm-var-dart.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-dart.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-var-dart.dtsi
index c7a9eb23e5e8..953950e55bf9 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-var-dart.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-var-dart.dtsi
@@ -138,6 +138,16 @@ &i2c1 {
sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
+ st33ktpm2xi2c_som: tpm@2e {
+ compatible = "st,st33ktpm2xi2c", "tcg,tpm-tis-i2c";
+ reg = <0x2e>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_tpm_reset>;
+ label = "tpm";
+ /* active-low TPM reset line. */
+ reset-gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;
+ };
+
pmic@4b {
compatible = "rohm,bd71847";
reg = <0x4b>;
@@ -452,6 +462,12 @@ MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
>;
};
+ pinctrl_tpm_reset: tpm-resetgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SAI3_TXFS_GPIO4_IO31 0x19
+ >;
+ };
+
pinctrl_uart4: uart4grp {
fsl,pins = <
MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x140
--
2.47.3