[PATCH v2 04/12] s390/percpu: Let MVIY_PERCPU() calculate alternative displacement
From: Heiko Carstens
Date: Fri Sep 18 2026 - 04:52:08 EST
Let MVIY_PERCPU() calculate the alternative lowcore displacement instead
of passing the same value(s) again and again in all percpu inline
assemblies.
This shortens the inline assemblies and makes them a bit more readable.
Signed-off-by: Heiko Carstens <hca@xxxxxxxxxxxxx>
---
arch/s390/include/asm/percpu.h | 68 +++++++++++++++-------------------
1 file changed, 29 insertions(+), 39 deletions(-)
diff --git a/arch/s390/include/asm/percpu.h b/arch/s390/include/asm/percpu.h
index 9888b38dedab..3bc448c4c2dd 100644
--- a/arch/s390/include/asm/percpu.h
+++ b/arch/s390/include/asm/percpu.h
@@ -99,7 +99,9 @@
* MVIY_ALT(...) <- end of percpu code section
*/
-#define MVIY_PERCPU(disp, dispalt, reg) \
+#define LC_ALT_ADDR __stringify(LOWCORE_ALT_ADDRESS)
+
+#define MVIY_PERCPU(disp, reg) \
".macro GEN_MVIY disp, reg\n" \
".set .Lreg,255\n" \
".irp rs,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15\n" \
@@ -112,19 +114,19 @@
".endif\n" \
"mviy \\disp(%%r0),.Lreg\n" \
".endm\n" \
- ALTERNATIVE("GEN_MVIY " disp ", " reg "\n", \
- "GEN_MVIY " dispalt ", " reg "\n", \
+ ALTERNATIVE("GEN_MVIY " disp " , " reg "\n", \
+ "GEN_MVIY " disp "+" LC_ALT_ADDR " , " reg "\n", \
ALT_FEATURE(MFEATURE_LOWCORE)) \
".purgem GEN_MVIY\n"
-#define MVIY_ALT(disp, dispalt) \
- ALTERNATIVE(" mviy " disp "(%%r0),0\n", \
- " mviy " dispalt "(%%r0),0\n", \
+#define MVIY_ALT(disp) \
+ ALTERNATIVE(" mviy " disp "(%%r0),0\n", \
+ " mviy " disp "+" LC_ALT_ADDR "(%%r0),0\n", \
ALT_FEATURE(MFEATURE_LOWCORE))
-#define AG_ALT(disp, dispalt, reg) \
- ALTERNATIVE(" ag " reg ", " disp "(%%r0)\n", \
- " ag " reg ", " dispalt "(%%r0)\n", \
+#define AG_ALT(disp, reg) \
+ ALTERNATIVE(" ag " reg ", " disp "(%%r0)\n", \
+ " ag " reg ", " disp "+" LC_ALT_ADDR "(%%r0)\n", \
ALT_FEATURE(MFEATURE_LOWCORE))
#ifndef MARCH_HAS_Z196_FEATURES
@@ -153,33 +155,29 @@ do { \
if (__builtin_constant_p(val__) && \
((szcast)val__ > -129) && ((szcast)val__ < 128)) { \
asm volatile( \
- MVIY_PERCPU("%[disppcpr]", "%[dispaltpcpr]", "%[ptr__]")\
- AG_ALT("%[disppcpo]", "%[dispaltpcpo]", "%[ptr__]") \
+ MVIY_PERCPU("%[disppcpr]","%[ptr__]") \
+ AG_ALT("%[disppcpo]", "%[ptr__]") \
op2 " 0(%[ptr__]),%[val__]\n" \
- MVIY_ALT("%[disppcpr]", "%[dispaltpcpr]") \
+ MVIY_ALT("%[disppcpr]") \
: [ptr__] "+&a" (ptr__), "+m" (*ptr__), \
"=m" (((struct lowcore *)0)->percpu_register) \
: [val__] "i" ((szcast)val__), \
[disppcpr] "i" (lc_pcpr), \
[disppcpo] "i" (lc_pcpo), \
- [dispaltpcpr] "i" (lc_pcpr + LOWCORE_ALT_ADDRESS), \
- [dispaltpcpo] "i" (lc_pcpo + LOWCORE_ALT_ADDRESS), \
"m" (((struct lowcore *)0)->percpu_offset) \
: "cc"); \
} else { \
asm volatile( \
- MVIY_PERCPU("%[disppcpr]", "%[dispaltpcpr]", "%[ptr__]")\
- AG_ALT("%[disppcpo]", "%[dispaltpcpo]", "%[ptr__]") \
+ MVIY_PERCPU("%[disppcpr]", "%[ptr__]") \
+ AG_ALT("%[disppcpo]", "%[ptr__]") \
op1 " %[old__],%[val__],0(%[ptr__])\n" \
- MVIY_ALT("%[disppcpr]", "%[dispaltpcpr]") \
+ MVIY_ALT("%[disppcpr]") \
: [old__] "=&d" (old__), \
[ptr__] "+&a" (ptr__), "+m" (*ptr__), \
"=m" (((struct lowcore *)0)->percpu_register) \
: [val__] "d" (val__), \
[disppcpr] "i" (lc_pcpr), \
[disppcpo] "i" (lc_pcpo), \
- [dispaltpcpr] "i" (lc_pcpr + LOWCORE_ALT_ADDRESS), \
- [dispaltpcpo] "i" (lc_pcpo + LOWCORE_ALT_ADDRESS), \
"m" (((struct lowcore *)0)->percpu_offset) \
: "cc"); \
} \
@@ -199,18 +197,16 @@ do { \
lc_pcpo = offsetof(struct lowcore, percpu_offset); \
ptr__ = PERCPU_PTR(&(pcp)); \
asm_inline volatile( \
- MVIY_PERCPU("%[disppcpr]", "%[dispaltpcpr]", "%[ptr__]")\
- AG_ALT("%[disppcpo]", "%[dispaltpcpo]", "%[ptr__]") \
+ MVIY_PERCPU("%[disppcpr]","%[ptr__]") \
+ AG_ALT("%[disppcpo]","%[ptr__]") \
op " %[old__],%[val__],0(%[ptr__])\n" \
- MVIY_ALT("%[disppcpr]", "%[dispaltpcpr]") \
+ MVIY_ALT("%[disppcpr]") \
: [old__] "=&d" (old__), \
[ptr__] "+&a" (ptr__), "+m" (*ptr__), \
"=m" (((struct lowcore *)0)->percpu_register) \
: [val__] "d" (val__), \
[disppcpr] "i" (lc_pcpr), \
[disppcpo] "i" (lc_pcpo), \
- [dispaltpcpr] "i" (lc_pcpr + LOWCORE_ALT_ADDRESS), \
- [dispaltpcpo] "i" (lc_pcpo + LOWCORE_ALT_ADDRESS), \
"m" (((struct lowcore *)0)->percpu_offset) \
: "cc"); \
old__ + val__; \
@@ -230,18 +226,16 @@ do { \
lc_pcpo = offsetof(struct lowcore, percpu_offset); \
ptr__ = PERCPU_PTR(&(pcp)); \
asm_inline volatile( \
- MVIY_PERCPU("%[disppcpr]", "%[dispaltpcpr]", "%[ptr__]")\
- AG_ALT("%[disppcpo]", "%[dispaltpcpo]", "%[ptr__]") \
+ MVIY_PERCPU("%[disppcpr]","%[ptr__]") \
+ AG_ALT("%[disppcpo]","%[ptr__]") \
op " %[old__],%[val__],0(%[ptr__])\n" \
- MVIY_ALT("%[disppcpr]", "%[dispaltpcpr]") \
+ MVIY_ALT("%[disppcpr]") \
: [old__] "=&d" (old__), \
[ptr__] "+&a" (ptr__), "+m" (*ptr__), \
"=m" (((struct lowcore *)0)->percpu_register) \
: [val__] "d" (val__), \
[disppcpr] "i" (lc_pcpr), \
[disppcpo] "i" (lc_pcpo), \
- [dispaltpcpr] "i" (lc_pcpr + LOWCORE_ALT_ADDRESS), \
- [dispaltpcpo] "i" (lc_pcpo + LOWCORE_ALT_ADDRESS), \
"m" (((struct lowcore *)0)->percpu_offset) \
: "cc"); \
} while (0)
@@ -263,16 +257,14 @@ do { \
lc_pcpo = offsetof(struct lowcore, percpu_offset); \
ptr__ = PERCPU_PTR(&(pcp)); \
asm_inline volatile( \
- MVIY_PERCPU("%[disppcpr]", "%[dispaltpcpr]", "%[ptr__]")\
- AG_ALT("%[disppcpo]", "%[dispaltpcpo]", "%[ptr__]") \
+ MVIY_PERCPU("%[disppcpr]","%[ptr__]") \
+ AG_ALT("%[disppcpo]","%[ptr__]") \
op " %[res__],0(%[ptr__])\n" \
- MVIY_ALT("%[disppcpr]", "%[dispaltpcpr]") \
+ MVIY_ALT("%[disppcpr]") \
: [res__] "=&d" (res__), [ptr__] "+&a" (ptr__), \
"=m" (((struct lowcore *)0)->percpu_register) \
: [disppcpr] "i" (lc_pcpr), \
[disppcpo] "i" (lc_pcpo), \
- [dispaltpcpr] "i" (lc_pcpr + LOWCORE_ALT_ADDRESS), \
- [dispaltpcpo] "i" (lc_pcpo + LOWCORE_ALT_ADDRESS), \
"m" (*ptr__), \
"m" (((struct lowcore *)0)->percpu_offset) \
: "cc"); \
@@ -294,17 +286,15 @@ do { \
lc_pcpo = offsetof(struct lowcore, percpu_offset); \
ptr__ = PERCPU_PTR(&(pcp)); \
asm_inline volatile( \
- MVIY_PERCPU("%[disppcpr]", "%[dispaltpcpr]", "%[ptr__]")\
- AG_ALT("%[disppcpo]", "%[dispaltpcpo]", "%[ptr__]") \
+ MVIY_PERCPU("%[disppcpr]","%[ptr__]") \
+ AG_ALT("%[disppcpo]","%[ptr__]") \
op " %[val__],0(%[ptr__])\n" \
- MVIY_ALT("%[disppcpr]", "%[dispaltpcpr]") \
+ MVIY_ALT("%[disppcpr]") \
: [ptr__] "+&a" (ptr__), "=m" (*ptr__), \
"=m" (((struct lowcore *)0)->percpu_register) \
: [val__] "d" (val__), \
[disppcpr] "i" (lc_pcpr), \
[disppcpo] "i" (lc_pcpo), \
- [dispaltpcpr] "i" (lc_pcpr + LOWCORE_ALT_ADDRESS), \
- [dispaltpcpo] "i" (lc_pcpo + LOWCORE_ALT_ADDRESS), \
"m" (((struct lowcore *)0)->percpu_offset) \
: "cc"); \
} while (0)
--
2.53.0