Re: [PATCH v6 01/10] ASoC: dt-bindings: qcom,shikra-qaif-cpu: Add binding

From: Mohammad Rafi Shaik

Date: Fri Sep 18 2026 - 11:04:27 EST




On 9/11/2026 2:47 PM, Harendra Gautam wrote:
Add the Devicetree binding for the Qualcomm Audio Interface (QAIF) CPU DAI
controller used on the Shikra audio platform, together with a dt-bindings
header for QAIF DAI and AIF interface IDs.
index 3a99703dbc4a..f08c20c84c60 100644
--- a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
+++ b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h

Please drop this DAI ID change from this series.

I have posted a separate series for these DAI ID additions since they are required by other Qualcomm platforms as well.

https://lore.kernel.org/all/20260918-qaif_dai_id_support-v1-0-ed863c0e5e45@xxxxxxxxxxxxxxxx/

Keeping them separate avoids blocking those board enablements and allows this series to remain focused on the Shikra-specific changes.

Best Regards,
Rafi.

@@ -156,6 +156,58 @@
#define LPI_MI2S_TX_5 150
#define LPI_MI2S_RX_6 151
#define LPI_MI2S_TX_6 152
+#define AIF_MI2S_RX_0 153
+#define AIF_MI2S_RX_1 154
+#define AIF_MI2S_RX_2 155
+#define AIF_MI2S_RX_3 156
+#define AIF_MI2S_RX_4 157
+#define AIF_MI2S_RX_5 158
+#define AIF_MI2S_RX_6 159
+#define AIF_MI2S_RX_7 160
+#define AIF_MI2S_RX_8 161
+#define AIF_MI2S_RX_9 162
+#define AIF_MI2S_RX_10 163
+#define AIF_MI2S_RX_11 164
+#define AIF_MI2S_RX_12 165
+#define AIF_MI2S_TX_0 166
+#define AIF_MI2S_TX_1 167
+#define AIF_MI2S_TX_2 168
+#define AIF_MI2S_TX_3 169
+#define AIF_MI2S_TX_4 170
+#define AIF_MI2S_TX_5 171
+#define AIF_MI2S_TX_6 172
+#define AIF_MI2S_TX_7 173
+#define AIF_MI2S_TX_8 174
+#define AIF_MI2S_TX_9 175
+#define AIF_MI2S_TX_10 176
+#define AIF_MI2S_TX_11 177
+#define AIF_MI2S_TX_12 178
+#define AIF_TDM_RX_0 179
+#define AIF_TDM_RX_1 180
+#define AIF_TDM_RX_2 181
+#define AIF_TDM_RX_3 182
+#define AIF_TDM_RX_4 183
+#define AIF_TDM_RX_5 184
+#define AIF_TDM_RX_6 185
+#define AIF_TDM_RX_7 186
+#define AIF_TDM_RX_8 187
+#define AIF_TDM_RX_9 188
+#define AIF_TDM_RX_10 189
+#define AIF_TDM_RX_11 190
+#define AIF_TDM_RX_12 191
+#define AIF_TDM_TX_0 192
+#define AIF_TDM_TX_1 193
+#define AIF_TDM_TX_2 194
+#define AIF_TDM_TX_3 195
+#define AIF_TDM_TX_4 196
+#define AIF_TDM_TX_5 197
+#define AIF_TDM_TX_6 198
+#define AIF_TDM_TX_7 199
+#define AIF_TDM_TX_8 200
+#define AIF_TDM_TX_9 201
+#define AIF_TDM_TX_10 202
+#define AIF_TDM_TX_11 203
+#define AIF_TDM_TX_12 204
#define LPASS_CLK_ID_PRI_MI2S_IBIT 1
#define LPASS_CLK_ID_PRI_MI2S_EBIT 2