Re: [PATCH v3 0/3] PCI/pcie: Add PCIe Lane Margining at Receiver (LMR) support

From: Priyank Rathod

Date: Fri Sep 18 2026 - 13:16:08 EST


Hi Bjorn, Ilpo,

Gentle ping on this series - it has been two weeks since v3 was posted
and I haven't seen any feedback yet.

v3 restructured the original monolithic LMR driver (v7) into the 3-patch
stack Ilpo suggested during the v7 review, moving the link endpoint
traversal into the PCI core rather than duplicating it in the feature
driver:

1/3 PCI: Add pcie_get_link_endpoints() helper
2/3 PCI/ASPM: Add pci_aspm_inhibit() helper for temporary link state
suppression
3/3 PCI/pcie: Add PCIe Lane Margining at Receiver (LMR) support

The LMR driver itself is now strictly self-contained in
drivers/pci/pcie/margin.c, with no modifications to drivers/pci/pci.c,
drivers/pci/pci-driver.c or drivers/pci/pci.h. The series builds clean
with W=1 and is checkpatch clean on x86_64 and arm64.

Feedback on patches 1 and 2 would be especially useful, since they are
the core helpers patch 3 builds on. I'm happy to respin if the split
isn't what you had in mind, or to rebase onto a newer base if that helps
review.

Thanks,
Priyank